Datasheet > IS46R83200F-6BLA2

IS46R83200F-6BLA2

更新时间： 2024-11-23 21:12:31

品牌	Logo	应用领域
美国芯成 - ISSI		动态存储器双倍数据速率内存集成电路
页数	文件大小	规格书
32页	1495K
描述
DDR DRAM, 32MX8, 0.7ns, CMOS, PBGA60, FBGA-60

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IS46R83200F-6BLA2 技术参数

生命周期：	Active	包装说明：	TBGA,
Reach Compliance Code：	unknown	ECCN代码：	EAR99
风险等级：	5.75	访问模式：	FOUR BANK PAGE BURST
最长访问时间：	0.7 ns	其他特性：	PROGRAMMABLE CAS LATENCY; AUTO/SELF REFRESH
JESD-30 代码：	R-PBGA-B60	长度：	13 mm
内存密度：	268435456 bit	内存集成电路类型：	DDR DRAM
内存宽度：	8	功能数量：	1
端口数量：	1	端子数量：	60
字数：	33554432 words	字数代码：	32000000
工作模式：	SYNCHRONOUS	最高工作温度：	105 °C
最低工作温度：	-40 °C	组织：	32MX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	TBGA
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY, THIN PROFILE
座面最大高度：	1.2 mm	自我刷新：	YES
最大供电电压 (Vsup)：	2.7 V	最小供电电压 (Vsup)：	2.3 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	宽度：	8 mm
Base Number Matches：	1

IS46R83200F-6BLA2 数据手册

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IS43/46R83200F

IS43/46R16160F

IS43/46R32800F

8Mx32, 16Mx16, 32Mx8

256Mb DDR SDRAM

FEATURES

OCTOBER 2016

DEVICE OVERVIEW

ISSI’sꢀ256-MbitꢀDDRꢀSDRAMꢀachievesꢀhighꢀspeedꢀdataꢀ

transfer using pipeline architecture and two data word

accessesꢀperꢀclockꢀcycle.ꢀTheꢀ268,435,456-bitꢀmemoryꢀ

arrayꢀisꢀinternallyꢀorganizedꢀasꢀfourꢀbanksꢀofꢀ64Mbꢀtoꢀ

allowꢀconcurrentꢀoperations.ꢀTheꢀpipelineꢀallowsꢀReadꢀ

and Write burst accesses to be virtually continuous, with

theꢀoptionꢀtoꢀconcatenateꢀorꢀtruncateꢀtheꢀbursts.ꢀTheꢀ

programmable features of burst length, burst sequence

andꢀCASꢀlatencyꢀenableꢀfurtherꢀadvantages.ꢀTheꢀdeviceꢀ

isꢀavailableꢀinꢀ8-bit,ꢀ16-bitꢀandꢀ32-bitꢀdataꢀwordꢀsizeꢀ

InputꢀdataꢀisꢀregisteredꢀonꢀtheꢀI/Oꢀpinsꢀonꢀbothꢀedgesꢀ

ofꢀDataꢀStrobeꢀsignal(s),ꢀwhileꢀoutputꢀdataꢀisꢀreferencedꢀ

toꢀbothꢀedgesꢀofꢀDataꢀStrobeꢀandꢀbothꢀedgesꢀofꢀCLK.ꢀ

CommandsꢀareꢀregisteredꢀonꢀtheꢀpositiveꢀedgesꢀofꢀCLK.ꢀ

•ꢀ VDDꢀandꢀVDDQ:ꢀ2.5Vꢀ±ꢀ0.2Vꢀ

•ꢀ SSTL_2ꢀcompatibleꢀI/O

•ꢀ Double-dataꢀrateꢀarchitecture;ꢀtwoꢀdataꢀtransfersꢀ

per clock cycle

•ꢀ Bidirectional,ꢀdataꢀstrobeꢀ(DQS)ꢀisꢀtransmitted/

received with data, to be used in capturing data

at the receiver

•ꢀ DQSꢀisꢀedge-alignedꢀwithꢀdataꢀforꢀREADsꢀandꢀ

centre-alignedꢀwithꢀdataꢀforꢀWRITEs

•ꢀ Differentialꢀclockꢀinputsꢀ(CKꢀandꢀCK)

•ꢀ DLLꢀalignsꢀDQꢀandꢀDQSꢀtransitionsꢀwithꢀCKꢀ

transitions

AnꢀAutoꢀRefreshꢀmodeꢀisꢀprovided,ꢀalongꢀwithꢀaꢀSelfꢀ

Refreshꢀmode.ꢀAllꢀI/OsꢀareꢀSSTL_2ꢀcompatible.

•ꢀ CommandsꢀenteredꢀonꢀeachꢀpositiveꢀCKꢀedge;ꢀdataꢀ

andꢀdataꢀmaskꢀreferencedꢀtoꢀbothꢀedgesꢀofꢀDQS

•ꢀ Fourꢀinternalꢀbanksꢀforꢀconcurrentꢀoperation

ADDRESS TABLE

Parameter

8M x 32

16M x 16

32M x 8

•ꢀ DataꢀMaskꢀforꢀwriteꢀdata.ꢀDMꢀmasksꢀwriteꢀdataꢀ

at both rising and falling edges of data strobe

Conﬁguration 2Mꢀxꢀ32ꢀxꢀ4ꢀ

4Mꢀxꢀ16ꢀxꢀ4ꢀ

8Mꢀxꢀ8ꢀxꢀ4ꢀ

•ꢀ BurstꢀLength:ꢀ2,ꢀ4ꢀandꢀ8

banks

•ꢀ BurstꢀType:ꢀSequentialꢀandꢀInterleaveꢀmode

•ꢀ ProgrammableꢀCASꢀlatency:ꢀ2,ꢀ2.5ꢀandꢀ3ꢀ

•ꢀ AutoꢀRefreshꢀandꢀSelfꢀRefreshꢀModes

•ꢀ AutoꢀPrecharge

BankꢀAddressꢀ BA0,ꢀBA1

Pins

BA0,ꢀBA1

Autoprecharge A8/AP

Pins

A10/AP

RowꢀAddress 4K(A0ꢀ–ꢀA11) 8K(A0ꢀ–ꢀA12) 8K(A0ꢀ–ꢀA12)

•ꢀ TRASꢀLockoutꢀsupportedꢀ(tRAP = tRCD)

Column

Address

512(A0ꢀ–ꢀA7,ꢀ 512(A0ꢀ–ꢀA8) 1K(A0ꢀ–ꢀA9)

A9)

OPTIONS

RefreshꢀCount

Com./Ind./A1 4Kꢀ/ꢀ64ms

A2 4Kꢀ/ꢀ16ms

•ꢀ Conﬁguration(s):ꢀ8Mx32,ꢀ16Mx16,ꢀ32Mx8

8Kꢀ/ꢀ64ms

8Kꢀ/ꢀ16ms

8Kꢀ/ꢀ64ms

•ꢀ Package(s):ꢀ

ꢀ 144ꢀBallꢀBGAꢀ(x32)

66-pinꢀTSOP-IIꢀ(x8,ꢀx16)ꢀandꢀ60ꢀBallꢀBGAꢀ(x8,ꢀx16)

•ꢀ Lead-freeꢀpackageꢀavailable

•ꢀ TemperatureꢀRange:ꢀ

KEY TIMING PARAMETERS

Speed Grade

-5

-6

Units

ꢀ Commercialꢀ(0°Cꢀtoꢀ+70°C)

FCkꢀMaxꢀCLꢀ=ꢀ3ꢀ

FCkꢀMaxꢀCLꢀ=ꢀ2.5ꢀ

FCkꢀMaxꢀCLꢀ=ꢀ2ꢀ

200ꢀ

167ꢀ

133ꢀ

167ꢀ

133ꢀ

ꢀ MHz

ꢀ Industrialꢀ(-40°Cꢀtoꢀ+85°C)

Automotive,ꢀA1ꢀ(-40°Cꢀtoꢀ+85°C)

Automotive,ꢀA2ꢀ(-40°Cꢀtoꢀ+105°C)

notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest

version of this device speciﬁcation before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-

ably be expected to cause failure of the life support system or to signiﬁcantly affect its safety or effectiveness. Products are not authorized for use in such applications

unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc.

Rev. B

10/18/2016

12 3 4 5 6 7...32

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与IS46R83200F-6BLA2相关器件

型号	品牌	获取价格	描述	数据表
IS46R86400D-6BLA1	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PBGA60, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD FREE,
IS46R86400D-6BLA1-TR	ISSI	获取价格	Cache DRAM Module, 64MX8, 0.7ns, CMOS, PBGA60, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, L
IS46R86400D-6TLA1	ISSI	获取价格	DDR DRAM, 64MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS46R86400D-6TLA1-TR	ISSI	获取价格	Cache DRAM Module, 64MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS46TR16128A-125KBLA1	ISSI	获取价格	256Mx8, 128Mx16 2Gb DDR3 SDRAM
IS46TR16128A-125KBLA2	ISSI	获取价格	256Mx8, 128Mx16 2Gb DDR3 SDRAM
IS46TR16128A-15HBLA1	ISSI	获取价格	256Mx8, 128Mx16 2Gb DDR3 SDRAM
IS46TR16128A-15HBLA2	ISSI	获取价格	256Mx8, 128Mx16 2Gb DDR3 SDRAM
IS46TR16128A-187FBLA1	ISSI	获取价格	256Mx8, 128Mx16 2Gb DDR3 SDRAM
IS46TR16128A-187FBLA2	ISSI	获取价格	256Mx8, 128Mx16 2Gb DDR3 SDRAM

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