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IS46TR16128B-15HBLA1 PDF预览

IS46TR16128B-15HBLA1

更新时间： 2024-10-28 19:46:55
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器双倍数据速率内存集成电路
页数 文件大小 规格书
87页 3266K
描述
DDR DRAM, 128MX16, CMOS, PBGA96, BGA-96

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IS46TR16128B-15HBLA1 技术参数

是否Rohs认证： 符合生命周期：End Of Life
包装说明：TFBGA,Reach Compliance Code：compliant
Factory Lead Time：10 weeks风险等级：5.57
访问模式：MULTI BANK PAGE BURST其他特性：AUTO/SELF REFRESH
JESD-30 代码：R-PBGA-B96长度：13 mm
内存密度：2147483648 bit内存集成电路类型：DDR DRAM
内存宽度：16功能数量：1
端口数量：1端子数量：96
字数：134217728 words字数代码：128000000
工作模式：ASYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：128MX16
封装主体材料：PLASTIC/EPOXY封装代码：TFBGA
封装形状：RECTANGULAR封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
座面最大高度：1.2 mm自我刷新：YES
最大供电电压 (Vsup)：1.575 V最小供电电压 (Vsup)：1.425 V
标称供电电压 (Vsup)：1.5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM宽度：9 mm
Base Number Matches：1

IS46TR16128B-15HBLA1 数据手册

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IS43/46TR16128B, IS43/46TR16128BL,  
IS43/46TR82560B, IS43/46TR82560BL  
256Mx8, 128Mx16 2Gb DDR3 SDRAM  
FEBRUARY 2018  
FEATURES  
Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  
Refresh Interval:  
7.8 us (8192 cycles/64 ms) Tc= -40°C to 85°C  
3.9 us (8192 cycles/32 ms) Tc= 85°C to 105°C  
Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V  
- Backward compatible to 1.5V  
Partial Array Self Refresh  
High speed data transfer rates with system  
frequency up to 1066 MHz  
Asynchronous RESET pin  
8 internal banks for concurrent operation  
8n-Bit pre-fetch architecture  
TDQS (Termination Data Strobe) supported (x8  
only)  
OCD (Off-Chip Driver Impedance Adjustment)  
Dynamic ODT (On-Die Termination)  
Driver strength : RZQ/7, RZQ/6 (RZQ = 240 Ω)  
Write Leveling  
Programmable CAS Latency  
Programmable Additive Latency: 0, CL-1,CL-2  
Programmable CAS WRITE latency (CWL) based  
on tCK  
Programmable Burst Length: 4 and 8  
Up to 200 MHz in DLL off mode  
Operating temperature:  
Programmable Burst Sequence: Sequential or  
Interleave  
Commercial (TC = 0°C to +95°C)  
Industrial (TC = -40°C to +95°C)  
Automotive, A1 (TC = -40°C to +95°C)  
Automotive, A2 (TC = -40°C to +105°C)  
BL switch on the fly  
Auto Self Refresh(ASR)  
Self Refresh Temperature(SRT)  
OPTIONS  
ADDRESS TABLE  
Parameter  
Configuration:  
256Mx8  
A0-A14  
A0-A9  
BA0-2  
1KB  
128Mx16  
A0-A13  
A0-A9  
BA0-2  
2KB  
256Mx8  
128Mx16  
Package:  
96-ball BGA (9mm x 13mm) for x16  
78-ball BGA (8mm x 10.5mm) for x8  
Row Addressing  
Column Addressing  
Bank Addressing  
Page size  
Auto Precharge  
Addressing  
A10/AP  
A10/AP  
BL switch on the fly  
A12/BC#  
A12/BC#  
SPEED BIN  
Speed Option  
15H  
125K  
107M  
093N  
Units  
JEDEC Speed Grade  
DDR3-1333H  
DDR3-1600K  
DDR3-1866M  
DDR3-2133N  
CL-nRCD-nRP  
tRCD,tRP(min)  
9-9-9  
13.5  
11-11-11  
13.75  
13-13-13  
13.91  
14-14-14  
13.09  
tCK  
ns  
Note: Faster speed options are backward compatible to slower speed options.  
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time  
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised  
to obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product  
can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use  
in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. – www.issi.com –  
1
Rev. G2  
01/25/2018  
1234567...87

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