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IS46R83200B-75TLA PDF预览

IS46R83200B-75TLA

更新时间： 2024-11-23 20:00:11
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器光电二极管内存集成电路
页数 文件大小 规格书
38页 666K
描述
Synchronous DRAM, 32MX8, 0.75ns, CMOS, PDSO66, 0.400 INCH, 0.65 MM PITCH, LEAD FREE, TSOP2-66

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IS46R83200B-75TLA 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSOP2
包装说明：TSOP2,针数：66
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.24风险等级：5.75
访问模式：FOUR BANK PAGE BURST最长访问时间：0.75 ns
其他特性：AUTO/SELF REFRESHJESD-30 代码：R-PDSO-G66
JESD-609代码：e3长度：22.22 mm
内存密度：268435456 bit内存集成电路类型：SYNCHRONOUS DRAM
内存宽度：8湿度敏感等级：3
功能数量：1端口数量：1
端子数量：66字数：33554432 words
字数代码：32000000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：32MX8封装主体材料：PLASTIC/EPOXY
封装代码：TSOP2封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.2 mm
自我刷新：YES最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Matte Tin (Sn) - annealed
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：10
宽度：10.16 mmBase Number Matches：1

IS46R83200B-75TLA 数据手册

 浏览型号IS46R83200B-75TLA的Datasheet PDF文件第2页浏览型号IS46R83200B-75TLA的Datasheet PDF文件第3页浏览型号IS46R83200B-75TLA的Datasheet PDF文件第4页浏览型号IS46R83200B-75TLA的Datasheet PDF文件第5页浏览型号IS46R83200B-75TLA的Datasheet PDF文件第6页浏览型号IS46R83200B-75TLA的Datasheet PDF文件第7页 
IS46R83200B  
IS46R16160B  
32Mx8, 16Mx16  
256Mb Synchronous DRAM  
PRELIMINARY INFORMATION  
MAY 2008  
FEATURES:  
•ꢀ Vd d =Vd d q = 2.5V+0.2V (-6, -75)  
•ꢀ Double data rate architecture ; two data transfers  
per clock cycle.  
•ꢀ Bidirectional , data strobe (DQS) is transmitted/  
received with data  
•ꢀ Differential clock input (CLK and /CLK)  
DESCRIPTION:  
IS46R83200B is a 4-bank x 8,388,608-word x8bit,  
IS46R16160B is a 4-bank x 4,194,304-word x 16bit  
double data rate synchronous DRAM , with SSTL_2  
interface. All control and address signals are referenced  
to the rising edge of CLK. Input data is registered on  
both edges of data strobe, and output data and data  
strobe are referenced on both edges of CLK. The device  
achieves very high speed clock rate up to 166 MHz.  
•ꢀ DLL aligns DQ and DQS transitions with CLK  
transitions edges of DQS  
•ꢀ Commands entered on each positive CLK edge;  
•ꢀ Data and data mask referenced to both edges of  
KEY TIMING PARAMETERS  
Parameter  
-6  
-75  
Unit  
DQS  
Clk Cycle Time  
•ꢀ 4 bank operation controlled by BA0 , BA1  
CAS Latency = 3  
CAS Latency = 2.5  
CAS Latency = 2  
6
6
7.5  
7.5  
7.5  
7.5  
ns  
ns  
ns  
(Bank Address)  
•ꢀ /CAS latency -2.0 / 2.5 / 3.0 (programmable) ;  
Burst length -2 / 4 / 8 (programmable)  
Burst type -Sequential / Interleave (program-  
mable)  
Clk Frequency  
CAS Latency = 3  
CAS Latency = 2.5  
CAS Latency = 2  
166  
166  
143  
143  
143  
143  
MHz  
MHz  
MHz  
•ꢀ Auto precharge/ All bank precharge controlled  
by A10  
Access Time from Clock  
CAS Latency = 3  
+0.70  
+0.70  
+0.75  
+0.75  
+0.75  
+0.75  
ns  
ns  
ns  
•ꢀ 8192 refresh cycles / 64ms (4 banks concurrent  
CAS Latency = 2.5  
CAS Latency = 2  
refresh)  
•ꢀ Auto refresh and Self refresh  
•ꢀ Row address A0-12 / Column address A0-9(x8)/  
A0-8(x16)  
•ꢀ SSTL_2 Interface  
•ꢀ Package 400-mil, 66-pin Thin Small Outline  
Package (TSOP II) with 0.65mm lead pitch  
•ꢀ Temperature Range:  
Automotive Grade, A: (0oC to +70oC)  
Automotive Grade, A1: (-40oC to +85oC)  
ADDRESS TABLE  
Parameter  
32M x 8  
16M x 16  
Configuration  
8M x 8 x 4 banks  
BA0, BA1  
A10/AP  
4M x 16 x 4 banks  
BA0, BA1  
A10/AP  
Bank Address Pins  
Autoprecharge Pins  
Row Addresses  
Column Addresses  
Refresh Count  
A0 – A12  
A0 – A12  
A0 – A9  
A0 – A8  
8192 / 64ms  
8192 / 64ms  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the  
latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc.  
1
Rev. 00A  
05/14/08  
1234567...38

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与IS46R83200B-75TLA相关器件

型号 品牌 获取价格 描述 数据表
IS46R83200D-6BLA1 ISSI

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 		DDR DRAM, 32MX8, 0.7ns, CMOS, PBGA60, 8 X 13 MM , 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD FREE
IS46R83200D-6BLA1-TR ISSI

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 		DDR DRAM, 32MX8, 0.7ns, CMOS, PBGA60,
IS46R83200F-6BA2 ISSI

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 		DDR DRAM, 32MX8, 0.7ns, CMOS, PBGA60, FBGA-60
IS46R83200F-6BLA2 ISSI

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 		DDR DRAM, 32MX8, 0.7ns, CMOS, PBGA60, FBGA-60
IS46R86400D-6BLA1 ISSI

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 		DDR DRAM, 64MX8, 0.7ns, CMOS, PBGA60, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, LEAD FREE,
IS46R86400D-6BLA1-TR ISSI

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 		Cache DRAM Module, 64MX8, 0.7ns, CMOS, PBGA60, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, L
IS46R86400D-6TLA1 ISSI

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 		DDR DRAM, 64MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS46R86400D-6TLA1-TR ISSI

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 		Cache DRAM Module, 64MX8, 0.7ns, CMOS, PDSO66, 0.400 INCH, LEAD FREE, TSOP2-66
IS46TR16128A-125KBLA1 ISSI

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 		256Mx8, 128Mx16 2Gb DDR3 SDRAM
IS46TR16128A-125KBLA2 ISSI

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 		256Mx8, 128Mx16 2Gb DDR3 SDRAM

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