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IRLC1304 PDF预览

IRLC1304

更新时间: 2024-11-20 23:59:43
品牌 Logo 应用领域
其他 - ETC 晶体晶体管
页数 文件大小 规格书
1页 46K
描述
TRANSISTOR | MOSFET | N-CHANNEL | 40V V(BR)DSS | CHIP

IRLC1304 数据手册

  
PD- 91871  
IRLC1304  
HEXFET® Power MOSFET Die in Wafer Form  
D
40 V  
Size 4.6  
Rds(on)=0.020  
G
6" Wafer  
S
Electrical Characteristics ( Wafer Form )  
Parameter  
V(BR)DSS  
RDS(on)  
Description  
Guaranteed (Min/Max)  
Test Conditions  
Drain-to-Source Breakdown Voltage  
Static Drain-to-Source On-Resistance  
40V Min.  
0.020Max.  
0.030Max.  
1.0V Min., 3.0V Max.  
25µA Max.  
VGS = 0V, ID = 250µA  
VGS = 10V, ID = 5.0A  
VGS = 4.5V, ID = 5.0A  
VDS = VGS, ID = 250µA  
VDS = 55V, VGS = 0V, TJ = 25°C  
VGS = ±16V  
VGS(th)  
IDSS  
Gate Threshold Voltage  
Drain-to-Source Leakage Current  
Gate-to-Source Leakage  
Operating Junction and  
IGSS  
TJ  
± 15µA Max.  
175°C Max.  
TSTG  
Storage Temperature Range  
Mechanical Data  
Nominal Backmetal Composition, Thickness:  
Nominal Front Metal Composition, Thickness:  
Dimensions:  
Cr-NiV-Ag ( 1kA°-2kA°-2.5kA° )  
99% Al, 1% Si (0.004 mm)  
0.181" x 0.303" ( 4.6mm x 7.7 mm)  
150mm, with std. < 100 > flat  
.014" + / -.003"  
Wafer Diameter:  
Wafer thickness:  
Relevant Die Mechanical Dwg. Number  
Minimum Street Width  
01-5298  
0.1 mm  
Reject Ink Dot Size  
0.13mm Diameter Minimum, 0.51mm Max.  
Store in original container, in dessicated  
nitrogen, with no contamination  
For optimum electrical results, die attach  
temperature should not exceed 300C  
Recommended Storage Environment:  
Recommended Die Attach Conditions  
Reference Standard IR packaged part ( for design ) : IRLBL1304  
Die Outline  
3/23/99  

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