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IRF7821UTRPBF PDF预览

IRF7821UTRPBF

更新时间： 2024-02-16 15:07:17
品牌 Logo 应用领域
英飞凌 - INFINEON 晶体晶体管功率场效应晶体管开关脉冲光电二极管
页数 文件大小 规格书
15页 1783K
描述
Power Field-Effect Transistor, 13.6A I(D), 30V, 0.0091ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MS-012AA, LEAD FREE, SOP-8

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IRF7821UTRPBF 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SMALL OUTLINE, R-PDSO-G8
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8541.29.00.95
风险等级：5.65雪崩能效等级（Eas）：44 mJ
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：30 V
最大漏极电流 (ID)：13.6 A最大漏源导通电阻：0.0091 Ω
FET 技术：METAL-OXIDE SEMICONDUCTORJEDEC-95代码：MS-012AA
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
湿度敏感等级：1元件数量：1
端子数量：8工作模式：ENHANCEMENT MODE
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
极性/信道类型：N-CHANNEL最大脉冲漏极电流 (IDM)：100 A
认证状态：Not Qualified表面贴装：YES
端子面层：MATTE TIN端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：30
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

IRF7821UTRPBF 数据手册

 浏览型号IRF7821UTRPBF的Datasheet PDF文件第2页浏览型号IRF7821UTRPBF的Datasheet PDF文件第3页浏览型号IRF7821UTRPBF的Datasheet PDF文件第4页浏览型号IRF7821UTRPBF的Datasheet PDF文件第5页浏览型号IRF7821UTRPBF的Datasheet PDF文件第6页浏览型号IRF7821UTRPBF的Datasheet PDF文件第7页 
IRDC3146EVAL  
IRU3146 EVALUATION BOARD USER GUIDE  
INTRODUCTION  
SPECIFICATION DATA  
This reference board is designed to demonstrate all  
the features of IRU3146 and can be configured to two  
types of applications:  
The IRU3146 IC is a Dual synchronous Buck controller,  
providing a cost-effective, high performance and flexible  
solution. The IRU3146 can be configured as a 2-inde-  
pendent or as a 2-phase controller. The 2-phase configu-  
ration is ideal for high current applications. The IRU3146  
features 1808 out of phase operation which reduces the  
required input/output capacitance and results in a fewer  
number of capacitors needed. Other key features offered  
by this device include two independent programmable  
soft starts, programmable switching frequency up to  
400KHz per phase, Hiccup current limit and an under  
voltage lockout function. The current limit is provided by  
sensing the lower MOSFET's on-resistance for optimum  
cost and performance.  
1) Dual outputs application (Independent Outputs)  
2) 2-phase application (Single Output)  
This user guide contains the schematic and bill of  
materials for each of these applications, and the  
design guidelines are described in data sheet.  
The MOSFETs sockets on the evaluation board are  
dual layout for SOIC-8 and Direct FET footprint.  
INPUT/OUTPUT CONNECTIONS  
The following is the input/output connections:  
The connection points for dual output application are  
shown in Figure 1. Connect the power supply cables  
according to this figure, minimizing wire lengths to re-  
duce losses in the wire. Test points J1, J2, J3 and J4  
provide easy connection for oscilloscope voltage probe  
to monitor the inductor points for each PWM section  
and output voltages.  
Inputs:  
JP1: Vin and Gnd  
JU4: VCC and Gnd  
JU5: VCL/VCH1/VCH2  
Outputs:  
Dual Outputs  
2-Phase  
JP2: Vout1 for Dual output  
JP5: Vout2 for Dual output  
JP4: Vout for 2-phase application  
VIN = 12V  
VIN = 12V  
VOUT1 = 2.5V  
VOUT1 = 1.8V  
IOUT1 = 10A  
IOUT1 = 35A  
VOUT2 = 1.8V  
∆VOUT = 50mV  
Scope Probe connections:  
J1 and J3: Inductor point for L2 and L3  
J2 and J4: Outputs for Vout1 and Vout2  
IOUT1 = 10A  
FS = 300KHz  
∆VOUT = 50mV  
FS = 300KHz  
Rev.1.0  
7/28/04  
www.irf.com  
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