Datasheet > IDT79RC32134

IDT79RC32134

更新时间： 2022-11-26 08:26:26

品牌	Logo	应用领域
艾迪悌 - IDT		控制器
页数	文件大小	规格书
25页	447K
描述
RISCore32300TM Family System Controller Chip

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IDT79RC32134 数据手册

IDT79RC32134

RISCore32300 Family

System Controller Chip

–

8/16/ or 32-bit interface per bank

Supports Flash ROM, SRAM, dual-port memory, and periph-

eral devices

Intel or Motorola style IO supports external wait-state genera-

tion

Features

◆

RC32300-family System Controller

–

Direct connection between RC32364 and RC32134

Up to 75 MHz operation

Drives latched address bus to memory and peripherals

Direct control of optional external data buffers

Programmable system watch-dog timers

Big or Little endian support

–

◆

4 DMA Channels

–

4 general purpose DMA, each with Endianness swappers and

byte lane data alignment

Any channel can be used for PCI

Supports memory-to-memory, memory-to-I/O,memory-to-

PCI, PCI-to-PCI, I/O-to-I/O transfers, and I/O support of

scatter/gather

Supports chaining via linked lists of records

Supports unaligned transfers

–

◆

Interrupt Control

–

Provides services for internal and external sources

Allows status of each interrupt to be read and masked

◆

Three general purpose 32-bit timer/counters

–

◆

Programmable IO (PIO)

Supports burst transfers

Programmable burst size

–

Input/Output/Interrupt source

Individually programmable

◆

PCI Bridge

SDRAM/EDODRAM Controller (32-bit memory only)

–

32-bit PCI, up to 33 MHz

Revision 2.1 compliant

Target and master

–

4 banks, non-interleaved, 256 MB total

Automatic refresh generation

–

◆

UART Interface

–

Host or satellite

Two 16550 Compatible UARTs

Baud rate support up to 1.5M

Three slot PCI arbiter, on-chip

Serial EEPROM support, for loading configuration

registers

◆

8/16/32-bit boot PROM support

◆

Boundary Scan JTAG Interface (IEEE Std. 1149.1

compatible)

◆

3.3V core operation

3.3V I/O operation with 5V tolerant I/O

208 pin PQFP package

◆

Memory & Peripheral Controller

–

6 banks, up to 8MB per bank

Block Diagram

Data & Address bus

CPU I/F

Timer, UART,

Interrupt Modules

SDRAM/EDODRAM Control

EDO/SDRAM

Control

Memory &

I/O Control

Memory I/O

Control

DMA Channels

RC32134

PCI I/F and Bridge

PCI Bus

The IDT logo is a registered trademark. RC64145, RC64474, RC64475, RC32134, RC4600, RC4640, RC4650, RC4700, RC3041, RC3051, RC3052, RC3081, RISController, and RISCore are trademarks of Inte-

grated Device Technology, Inc.

1 of 25

April 9, 2001

DSC 5602

2000 Integrated Device Technology, Inc.

12 3 4 5 6 7...25

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