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IDT79RC32T332-100DHI PDF预览

IDT79RC32T332-100DHI

更新时间： 2024-09-15 18:54:35
品牌 Logo 应用领域
艾迪悌 - IDT 外围集成电路
页数 文件大小 规格书
30页 400K
描述
Microprocessor, 32-Bit, 100MHz, CMOS, PQFP208

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IDT79RC32T332-100DHI 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：ObsoleteReach Compliance Code：not_compliant
风险等级：5.88位大小：32
JESD-30 代码：S-PQFP-G208JESD-609代码：e0
湿度敏感等级：3端子数量：208
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP208,1.2SQ,20封装形状：SQUARE
封装形式：FLATPACK峰值回流温度（摄氏度）：225
电源：2.5,3.3 V认证状态：Not Qualified
速度：100 MHz子类别：Microprocessors
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn85Pb15)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
uPs/uCs/外围集成电路类型：MICROPROCESSORBase Number Matches：1

IDT79RC32T332-100DHI 数据手册

 浏览型号IDT79RC32T332-100DHI的Datasheet PDF文件第2页浏览型号IDT79RC32T332-100DHI的Datasheet PDF文件第3页浏览型号IDT79RC32T332-100DHI的Datasheet PDF文件第4页浏览型号IDT79RC32T332-100DHI的Datasheet PDF文件第5页浏览型号IDT79RC32T332-100DHI的Datasheet PDF文件第6页浏览型号IDT79RC32T332-100DHI的Datasheet PDF文件第7页 
IDTTM InterpriseTM Integrated  
Communications Processor  
3.3V and 2.5V Devices  
79RC32332  
–
–
Cache locking per line  
Device Overview  
Programmable on a page basis to implement a write-through  
no write allocate, write-through write allocate, or write-back  
algorithms for cache management  
The RC32332 device is a member of the IDT™ Interprise™ family of  
integrated communications processors. This product incorporates a  
high-performance, low-cost 32-bit CPU core with functionality common  
to a large number of embedded applications. The RC32332 integrates  
these functions to enable the use of low-cost PC commodity market  
memory and I/O devices, allowing the aggressive price/performance  
characteristics of the CPU to be realized quickly into low-cost systems.  
–
Compatible with a wide variety of operating systems  
◆
Local Bus Interface  
–
–
–
–
–
–
Interrupt Controller simplifies exception management  
Four general purpose 32-bit timer/counters  
Programmable I/O (PIO)  
–
–
Up to 75 MHz operation  
23-bit address bus  
32-bit data bus  
Direct control of local memory and peripherals  
Programmable system watch-dog timers  
Big or little endian support  
The RC32332 device is available with either a 3.3V or 2.5V operating  
voltage. Differences between the two versions are noted where appli-  
cable.  
◆
◆
◆
Features  
◆
RC32300 32-bit Microprocessor  
Input/Output/Interrupt source  
Individually programmable  
–
–
–
–
–
–
–
–
–
Up to 150 MHz operation  
Enhanced MIPS-II Instruction Set Architecture (ISA)  
Cache prefetch instruction  
Conditional move instruction  
DSP instructions  
Supports big or little endian operation  
MMU with 32 page TLB  
8KB Instruction Cache, 2-way set associative  
2KB Data Cache, 2-way set associative  
◆
SDRAM Controller (32-bit memory only)  
–
–
–
4 banks, non-interleaved  
Up to 512MB total SDRAM memory supported  
Implements full, direct control of discrete, SODIMM, or DIMM  
memories  
Supports 16Mb through 512Mb SDRAM device depths  
Automatic refresh generation  
–
–
Block Diagram  
Interrupt Contro  
l
EJTAG  
In-Circuit Emulator Interface  
Programmable I/O  
SPI Control  
32-bit Timers  
RISCore 32300  
Enhanced MIPS-II ISA Compatible  
Integer CPU  
RC5000  
CP0  
DMA Control  
UART  
Local  
Memory/IO  
Control  
32-page  
TLB  
IPBus  
Bridge  
SDRAM  
Control  
IDT  
Peripheral  
Bus  
8KB  
2-set  
2KB  
2-set, Lockable  
Lockable  
Instr. Cache  
Data Cache  
PCI Bridge  
Figure 1 RC32332 Block Diagram  
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.  
1 of 30  
May 4, 2004  
DSC 5701  
© 2004 Integrated Device Technology, Inc.  
1234567...30

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IDT79RC32T355-133DHGI IDT

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