5秒后页面跳转
捷配首页

Datasheet > IDT5T93GL161PFGI8
IDT5T93GL161PFGI8 PDF预览

IDT5T93GL161PFGI8

更新时间： 2024-09-28 09:18:43
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
20页 871K
描述
Low Skew Clock Driver, 5T Series, 16 True Output(s), 0 Inverted Output(s), CMOS, PQFP64, GREEN, TQFP-64

阅读下载

中文翻译

获取价格

IDT5T93GL161PFGI8 数据手册

 浏览型号IDT5T93GL161PFGI8的Datasheet PDF文件第2页浏览型号IDT5T93GL161PFGI8的Datasheet PDF文件第3页浏览型号IDT5T93GL161PFGI8的Datasheet PDF文件第4页浏览型号IDT5T93GL161PFGI8的Datasheet PDF文件第5页浏览型号IDT5T93GL161PFGI8的Datasheet PDF文件第6页浏览型号IDT5T93GL161PFGI8的Datasheet PDF文件第7页 
2.5V LVDS, 1:16 GLITCHLESS CLOCK BUFFER  
TERABUFFER™ II  
IDT5T93GL161  
General Description  
Features  
The IDT5T93GL161 2.5V differential clock buffer is a  
• Guaranteed low skew: <75ps (maximum)  
user-selectable differential input to sixteen LVDS outputs. The  
fanout from a differential input to sixteen LVDS outputs reduces  
loading on the preceding driver and provides an efficient clock  
distribution network. The IDT5T93GL161 can act as a translator  
from a differential HSTL, eHSTL, LVEPECL (2.5V), LVPECL  
(3.3V), CML, or LVDS input to LVDS outputs. A single-ended 3.3V  
/ 2.5V LVTTL input can also be used to translate to LVDS outputs.  
The redundant input capability allows for a glitchless change-over  
from a primary clock source to a secondary clock source.  
Selectable inputs are controlled by SEL. During the switchover,  
the output will disable LOW for up to three clock cycles of the  
previously-selected input clock. The outputs will remain LOW for  
up to three clock cycles of the newly-selected clock, after which  
the outputs will start from the newly-selected input. A FSEL pin  
has been implemented to control the switchover in cases where a  
clock source is absent or is driven to DC levels below the minimum  
specifications.  
• Very low duty cycle distortion: <100ps (maximum)  
• High speed propagation delay: <2.2ns (maximum)  
• Up to 450MHz operation  
• Selectable inputs  
• Hot insertable and over-voltage tolerant inputs  
• 3.3V/2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL  
(3.3V), CML or LVDS input interface  
• Selectable differential inputs to sixteen LVDS outputs  
• Power-down mode  
• At power-up, FSEL should be LOW  
• 2.5V VDD  
• -40°C to 85°C ambient operating temperature  
• Available in TQFP package  
The IDT5T93GL161 outputs can be asynchronously  
enabled/disabled. When disabled, the outputs will drive to the  
value selected by the GL pin. Multiple power and grounds reduce  
noise.  
Applications  
Pin Assignment  
• Clock distribution  
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49  
1
2
3
4
5
6
7
8
9
G1  
GND  
GND  
48  
47  
46  
G2  
GND  
GND  
VDD  
VDD  
45  
44  
43  
Q1  
Q1  
Q12  
Q12  
Q11  
Q11  
Q10  
IDT5T93GL161  
64-Lead TQFP E-Pad  
10mm x 10mm x 1.0mm package body  
Y package  
Q2  
Q2  
Q3  
42  
41  
40  
Q3  
Q4  
Q4  
10  
11  
12  
Q10  
Q9  
39  
38  
37  
Top View  
Q9  
V
DD  
13  
V
DD  
36  
35  
34  
A1 14  
A1  
GND 16  
17 18 19 20 21  
A2  
A2  
15  
GND  
33  
23 24 25 26 27 28 29 30 31 32  
22  
IDT™ LVDS GLITCHLESS CLOCK BUFFER TERABUFFER™ II  
1
IDT5T93GL161 REV. A SEPTEMBER 12, 2008  
1234567...20

中文翻译

下载PDF

与IDT5T93GL161PFGI8相关器件

型号 品牌 获取价格 描述 数据表
IDT5T93GL161PFI IDT

获取价格

 		Low Skew Clock Driver, 5T Series, 16 True Output(s), 0 Inverted Output(s), CMOS, PQFP64, T
IDT5T93GL16NLGI IDT

获取价格

 		Low Skew Clock Driver, 5T Series, 16 True Output(s), 0 Inverted Output(s), PQCC52, GREEN,
IDT5T940 IDT

获取价格

 		PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
IDT5T940-10NLI IDT

获取价格

 		PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
IDT5T940-10NLI8 IDT

获取价格

 		PLL Based Clock Driver, 5T Series, 2 True Output(s), 0 Inverted Output(s), PQCC28, PLASTIC
IDT5T940-30NLGI8 IDT

获取价格

 		PLL Based Clock Driver, 5T Series, 2 True Output(s), 0 Inverted Output(s), PQCC28, GREEN,
IDT5T940-30NLI IDT

获取价格

 		PRECISION CLOCK GENERATOR OC-192 APPLICATIONS
IDT5T940-30NLI8 IDT

获取价格

 		PLL Based Clock Driver, 5T Series, 2 True Output(s), 0 Inverted Output(s), PQCC28, PLASTIC
IDT5T9820NLGI IDT

获取价格

 		PLL Based Clock Driver, 5T Series, 10 True Output(s), 0 Inverted Output(s), GREEN, PLASTIC
IDT5T9820NLI8 IDT

获取价格

 		PLL Based Clock Driver, 5T Series, 10 True Output(s), 0 Inverted Output(s), PQCC68, PLASTI

与IDT5T93GL161PFGI8相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证