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GTL2007PW PDF预览

GTL2007PW

更新时间: 2024-11-26 03:40:03
品牌 Logo 应用领域
恩智浦 - NXP 转换器电平转换器驱动程序和接口锁存器接口集成电路光电二极管
页数 文件大小 规格书
19页 99K
描述
13-bit GTL to LVTTL translator with power good control

GTL2007PW 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, MO-153, SOT-361-1, TSSOP-28
针数:28Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.81Is Samacsys:N
最大延迟:10 ns接口集成电路类型:GTL TO TTL TRANSCEIVER
JESD-30 代码:R-PDSO-G28JESD-609代码:e4
长度:9.7 mm湿度敏感等级:1
位数:1功能数量:13
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C输出锁存器或寄存器:NONE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP28,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Other Interface ICs最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

GTL2007PW 数据手册

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GTL2007  
13-bit GTL to LVTTL translator with power good control  
Rev. 01 — 2 June 2005  
Product data sheet  
1. General description  
The GTL2007 is a customized translator between dual Xeon processors, Platform Health  
Management, South Bridge and Power Supply LVTTL and GTL signals.  
The GTL2007 is derived from the GTL2006 with an enable function added that disables  
the error output to the monitoring agent for platforms that monitor the individual error  
conditions from each processor. This enable function can be used so that false error  
conditions are not passed to the monitoring agent when the system is unexpectedly  
powered down. This unexpected power-down could be from a power supply overload, a  
CPU thermal trip, or some other event of which the monitoring agent is unaware.  
A typical implementation would be to connect each enable line to the system power good  
signal or the individual enables to the VRD power good for each processor.  
The Nocona and Dempsey/Blackford Xeon processors specify a VTT of 1.2 V and 1.1 V,  
as well as a nominal Vref of 0.76 V and 0.73 V respectively. To allow for future voltage level  
changes that may extend Vref to 0.63 of VTT (minimum of 0.693 V with VTT of 1.1 V) the  
GTL2009 allows a minimum Vref of 0.66 V. Characterization results show that there is little  
DC or AC performance variation between these levels.  
The GTL2007 is the companion chip to the GTL2009 3-bit GTL Front-Side Bus frequency  
comparator that is used in dual-processor Xeon applications.  
2. Features  
Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver  
3.0 V to 3.6 V operation  
LVTTL I/O not 5 V tolerant  
Series termination on the LVTTL outputs of 30  
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per  
JESD22-A115, and 1000 V CDM per JESD22-C101  
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 500 mA  
Package offered: TSSOP28  

GTL2007PW 替代型号

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