Datasheet > FTC41041-20JMLF

FTC41041-20JMLF

更新时间： 2024-11-13 02:47:31

品牌	Logo	应用领域
福思力 - FORCE		/
页数	文件大小	规格书
11页	1528K
描述
HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM

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FTC41041-20JMLF 数据手册

FTC41041

HIGH SPEED 256K x 16 (4 MEG)

STATIC CMOS RAM

FEATURES

Easy Memory Expansion Using CE and OE

Inputs

Fully TTL Compatible Inputs and Outputs

Advanced CMOS Technology

Fast t_OE

Automatic Power Down when deselected

Package: 44-Pin SOJ

High Speed (Equal Access and Cycle Times)

— 10/12/15/20 ns (Commercial)

— 12/15/20 ns (Industrial/Military)

Low Power

Single 5.0V ± 10% Power Supply

2.0V Data Retention

DESCRIPTION

The FTC41041 device provides asynchronous operation

with matching access and cycle times. Memory loca-

tions are speciﬁed on address pins A₀to A₁₇. Reading

is accomplished by device selection (CE and output

enabling (OE) while write enable (WE) remains HIGH.

By presenting the address under these conditions, the

data in the addressed memory location is presented on

the data input/output pins. The input/output pins stay

in the HIGH Z state when either CE or OE is HIGH or

WE is LOW.

The FTC41041 is a 262,144 words by 16 bits high-speed

CMOS static RAM. The CMOS memory requires no

clocks or refreshing, and has equal access and cycle

times. Inputs are fully TTL-compatible. The RAM

operates from a single 5.0V ± 10% tolerance power

supply.

Access times as fast as 10 nanoseconds permit greatly

enhanced system operating speeds. CMOS is utilised

to reduce power consumption to a low level.

The FTC41041 is a member of a family of FTSRAM

products offering fast access times.

PIN CONFIGURATION

FUNCTIONAL BLOCK DIAGRAM

SOJ

2013

1 of 11

Rev C

12 3 4 5 6 7...11

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