Datasheet > FTC41041-20JMLF

FTC41041-20JMLF

更新时间： 2022-05-14 22:16:25

品牌	Logo	应用领域
福思力 - FORCE		/
页数	文件大小	规格书
11页	1528K
描述
HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM

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FTC41041-20JMLF 数据手册

FTC41041

HIGH SPEED 256K x 16 (4 MEG)

STATIC CMOS RAM

AC TEST CONDITIONS

Input Pulse Levels

GND to 3.0V

Input Rise and Fall Times

Input Timing Reference Level

Output Timing Reference Value

Output Load

3ns

1.5V

See Figures 1 & 2

Figure 1. Output Load

Figure 2. Thevenin Equivalent

* including scope and test ﬁxture.

Note:

Becauseoftheultra-highspeedofthe FTC41041,caremustbetakenwhen

testing this device; an inadequate setup can cause a normal functioning

part to be rejected as faulty. Long high-inductance leads that cause

supply bounce must be avoided by bringing the V_CCand ground planes

directly up to the contactor ﬁngers. A 0.01 µF high frequency capacitor

is also required between V_CCand ground. To avoid signal reﬂections,

proper termination must be used; for example, a 50Ω test environment

should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at

the comparator input, and a 116Ω resistor must be used in series with

D_OUTto match 166Ω (Thevenin Resistance).

TRUTH TABLE

Mode

BLE

BHE

I/O₀- I/O₇

High Z

D_OUT

I/O₈- I/O₁₅

High Z

D_OUT

Power

Standby

Active

Powerdown

Read All Bits

Read Lower Bits Only

Read Upper Bits Only

Write All Bits

D_OUT

High Z

D_OUT

High Z

D_IN

Write Lower Bits Only

Write Upper Bits Only

Selected, Outputs Disabled

D_IN

High Z

D_IN

High Z

2013

7 of 11

Rev C

1 2 3 456 7 8...11

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