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FQI13N10L PDF预览

FQI13N10L

更新时间: 2024-11-03 22:32:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 567K
描述
100V LOGIC N-Channel MOSFET

FQI13N10L 数据手册

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December 2000  
TM  
QFET  
FQB13N10L / FQI13N10L  
100V LOGIC N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
12.8A, 100V, R  
= 0.18@V = 10 V  
DS(on) GS  
Low gate charge ( typical 8.7 nC)  
Low Crss ( typical 20 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
This advanced technology is especially tailored to minimize  
on-state  
resistance,  
provide  
superior  
switching  
performance, and withstand high energy pulse in the  
avalanche and commutation modes. These devices are  
well suited for low voltage applications such as high  
efficiency switching DC/DC converters, and DC motor  
control.  
175°C maximum junction temperature rating  
D
!
D
"
! "  
"
!
G
"
G
S
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
D
S
!
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB13N10L / FQI13N10L  
Units  
V
V
I
Drain-Source Voltage  
100  
12.8  
9.05  
51.2  
± 20  
95  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
A
DM  
V
E
I
Gate-Source Voltage  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
12.8  
6.5  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
mJ  
V/ns  
W
AR  
dv/dt  
6.0  
Power Dissipation (T = 25°C) *  
3.75  
65  
P
A
D
Power Dissipation (T = 25°C)  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.43  
-55 to +175  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
1/8” from case for 5 seconds  
T
300  
°C  
L
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
2.31  
40  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2000 Fairchild Semiconductor International  
Rev. A4, December 2000  

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