January 2009
QFET®
FQD13N10 / FQU13N10
100V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
•
•
•
•
•
•
•
10A, 100V, R
= 0.18Ω @V = 10 V
DS(on) GS
Low gate charge ( typical 12 nC)
Low Crss ( typical 20 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
RoHS Compliant
D
!
D
"
! "
"
"
!
G
I-PAK
FQU Series
D-PAK
FQD Series
G
S
G
D
!
S
S
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQD13N10 / FQU13N10
Units
V
V
I
Drain-Source Voltage
100
10
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
6.3
A
C
I
(Note 1)
Drain Current
- Pulsed
40
A
DM
V
E
I
Gate-Source Voltage
± 25
95
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
10
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
4.0
mJ
V/ns
W
AR
dv/dt
6.0
Power Dissipation (T = 25°C) *
2.5
P
A
D
Power Dissipation (T = 25°C)
40
W
C
- Derate above 25°C
Operating and Storage Temperature Range
0.32
-55 to +150
W/°C
°C
T , T
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
3.13
50
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
θJC
θJA
θJA
--
--
110
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor Corporation
Rev. A2. January 2009