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FQD17N08 PDF预览

FQD17N08

更新时间: 2024-11-04 22:09:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
9页 598K
描述
80V N-Channel MOSFET

FQD17N08 数据手册

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January 2001  
TM  
QFET  
FQD17N08 / FQU17N08  
80V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
This advanced technology has been especially tailored to  
minimize on-state resistance, provide superior switching  
performance, and withstand a high energy pulse in the  
avalanche and commutation modes. These devices are  
well suited for low voltage applications such as automotive,  
high efficiency switching for DC/DC converters, and DC  
motor control.  
12.9A, 80V, R  
= 0.115@V = 10 V  
DS(on) GS  
Low gate charge ( typical 12 nC)  
Low Crss ( typical 28 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
D
!
D
"
! "  
"
"
!
G
I-PAK  
FQU Series  
D-PAK  
FQD Series  
G
S
G
D
!
S
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQD17N08 / FQU17N08  
Units  
V
V
I
Drain-Source Voltage  
80  
12.9  
8.2  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
51.6  
± 25  
100  
A
DM  
V
E
I
Gate-Source Voltage  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
12.9  
4.0  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
mJ  
V/ns  
W
AR  
dv/dt  
6.5  
Power Dissipation (T = 25°C) *  
2.5  
P
A
D
Power Dissipation (T = 25°C)  
40  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.32  
-55 to +150  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8" from case for 5 seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
3.13  
50  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
110  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2000 Fairchild Semiconductor International  
Rev. A1, January 2001  

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