February 2010
tm
FQD12P10TM_F085
100V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
•
•
•
•
•
•
-9.4A, -100V, R
= 0.29Ω @V = -10 V
DS(on) GS
Low gate charge ( typical 21 nC)
Low Crss ( typical 65 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
•
•
Qualified to AEC Q101
RoHS Compliant
D
D
G
G
S
D-PAK
S
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
Ratings
-100
-9.4
Units
V
V
I
Drain-Source Voltage
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
-6.0
A
C
I
(Note 1)
Drain Current
- Pulsed
-37.6
± 30
A
DM
V
E
I
Gate-Source Voltage
V
GSS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
370
mJ
A
AS
-9.4
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
5.0
mJ
V/ns
W
AR
dv/dt
-6.0
Power Dissipation (T = 25°C) *
2.5
P
A
D
Power Dissipation (T = 25°C)
50
W
C
- Derate above 25°C
Operating and Storage Temperature Range
0.4
W/°C
°C
T , T
-55 to +150
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8! from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
2.5
50
θJC
θJA
θJA
--
--
110
* When mounted on the minimum pad size recommended (PCB Mount)
©2010 Fairchild Semiconductor Corporation
FQD12P10TM_F085 Rev. A
1
www.fairchildsemi.com