Datasheet > EMB20P03G

EMB20P03G

更新时间： 2024-11-19 17:15:43

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
5页	181K
描述
SOP-8

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中文翻译

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数据手册

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EMB20P03G 数据手册

EMB20P03G

P‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

‐30V

20mΩ

‐10A

DSON (MAX.)

UIS, Rg 100% Tested

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±25

‐10

‐8

UNIT

Gate‐Source Voltage

V_GS

T_C= 25 °C

Continuous Drain Current

I_D

T_C= 100 °C

Pulsed Drain Current¹

I_DM

I_AS

‐40

‐15

Avalanche Current

L = 0.1mH, I

L = 0.05mH

T_A= 25 °C

D=‐10A, RG=25Ω

Avalanche Energy

E_AS

E_AR

Repetitive Avalanche Energy²

2.5

Power Dissipation

P_D

°C

T_A= 100 °C

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

100% UIS testing in condition of V_D=‐15V, L=0.1mH, V_G=‐10V, I_L=‐10A, Rated V_DS=‐30V P‐CH

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Case

Junction‐to‐Ambient³

°C / W

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³50°C / W when mounted on a 1 in²pad of 2 oz copper.

2013/9/18

p.1

12 3 4 5

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