Datasheet > EMB21A03V

EMB21A03V

更新时间： 2024-11-19 17:15:43

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
5页	202K
描述
EDFN3X3

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中文翻译

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数据手册

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EMB21A03V 数据手册

EMB21A03V

Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

RDSON (MAX.)

30V

21mΩ

UIS, Rg 100% Tested

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±20

UNIT

Gate‐Source Voltage

V_GS

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 100 °C

6.3

Pulsed Drain Current¹

I_DM

I_AS

Avalanche Current

L = 0.1mH, I_AS=10A, RG=25Ω

L = 0.05mH

Avalanche Energy

E_AS

E_AR

Repetitive Avalanche Energy²

2.5

2.27

T_A= 25 °C

Power Dissipation

P_D

°C

T_A= 100 °C

0.9

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

100% UIS testing in condition of V_D=15V, L=0.1mH, V_G=10V, I_L=7.5A, Rated V_DS=30V N‐CH

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Case

Junction‐to‐Ambient³

7.5

°C / W

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³55°C / W when mounted on a 1 in²pad of 2 oz copper.

2017/8/28ꢀ

p.1ꢀ

12 3 4 5

中文翻译

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