Datasheet > EMB21C03G

EMB21C03G

更新时间： 2024-11-18 17:15:39

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
8页	242K
描述
SOP-8

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EMB21C03G 数据手册

EMB21C03G

N & P‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

N‐CH

30V

P‐CH

‐30V

35mΩ

‐6A

BVDSS

21mΩ

7.5A

DSON (MAX.)

UIS, Rg 100% Tested

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

UNIT

Gate‐Source Voltage

V_GS

N‐CH

±20

7.5

5.5

P‐CH

±20

‐6

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 100 °C

‐5

Pulsed Drain Current¹

I_DM

I_AS

‐24

‐10

1.8

Avalanche Current

L = 0.1mH, ID=7.5A, RG=25Ω(N)

L = 0.1mH, ID=‐6A, RG=25Ω(P)

Avalanche Energy

E_AS

2.8

Repetitive Avalanche Energy²

Power Dissipation

L = 0.05mH

T_A= 25 °C

T_A= 100 °C

E_AR

P_D

1.4

0.9

°C

0.8

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

100% UIS testing in condition of V_D=15V, L=0.1mH, V_G=10V, I_L=7.5A, Rated V_DS=30V N‐CH

100% UIS testing in condition of V_D=15V, L=0.1mH, V_G=‐10V, I_L=‐6A, Rated V_DS=‐30V P‐CH

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

Junction‐to‐Case

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

°C / W

Junction‐to‐Ambient³

62.5

R_JA

2012/10/25

p.1

12 3 4 5 6 7 8

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