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EMB20P03VAT-L PDF预览

EMB20P03VAT-L

更新时间: 2024-11-19 17:15:23
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杰力科技 - EXCELLIANCE /
页数 文件大小 规格书
6页 899K
描述
TDFN2.0X2.0-06

EMB20P03VAT-L 数据手册

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EMB20P03VAT-L  
P-Channel Logic Level Enhancement Mode Field Effect Transistor  
Product Summary:  
BVDSS  
RDSON (MAX.)  
ID  
-30V  
20mΩ  
-8.7A  
Single P Channel MOSFET  
Rg 100% Tested  
Pb-Free Lead Plating & Halogen Free  
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS  
SYMBOL  
LIMITS  
±20  
UNIT  
Gate-Source Voltage  
VGS  
V
TA = 25 °C  
-8.7  
Continuous Drain Current  
ID  
TA = 70 °C  
-6.4  
A
Pulsed Drain Current1  
IDM  
-34.8  
2.08  
TA = 25 °C  
Power Dissipation  
PD  
W
°C  
TA = 70 °C  
1.33  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
-55 to 150  
THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
RJC  
TYPICAL  
MAXIMUM  
UNIT  
Junction-to-Case  
Junction-to-Ambient3  
12  
60  
°C / W  
RJA  
1Pulse width limited by maximum junction temperature.  
2Duty cycle 1%  
360°C / W when mounted on a 1 in2 pad of 2 oz copper.  
2019/5/22  
p.1