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EMB09A03VP PDF预览

EMB09A03VP

更新时间: 2024-11-21 17:15:47
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杰力科技 - EXCELLIANCE /
页数 文件大小 规格书
10页 968K
描述
DFN3X3

EMB09A03VP 数据手册

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EMB09A03VP  
N-Channel Logic Level Enhancement Mode Field Effect Transistor  
Product Summary:  
N-CH-Q1 N-CH-Q2  
VDSS  
30V  
30V  
9mΩ  
16A  
9mΩ  
16A  
RDSON (MAX.)  
ID  
N Channel MOSFET  
UIS, Rg 100% Tested  
Pb-Free Lead Plating & Halogen Free  
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS  
SYMBOL  
LIMITS  
UNIT  
Q1  
±20  
16  
Q2  
Gate-Source Voltage  
VGS  
±20  
16  
V
A
TC = 25 °C  
Continuous Drain Current  
ID  
TC = 100 °C  
12  
12  
Pulsed Drain Current1  
Avalanche Current  
IDM  
IAS  
64  
64  
16  
16  
L = 0.1mH, RG=25Ω  
L = 0.05mH  
Avalanche Energy  
EAS  
EAR  
12.8  
6.4  
25  
12.8  
6.4  
25  
mJ  
Repetitive Avalanche Energy2  
TC = 25 °C  
Power Dissipation  
PD  
W
°C  
TC = 100 °C  
10  
10  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
-55 to 150  
THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
Steady State  
TYPICAL  
MAXIMUM  
UNIT  
Junction-to-Case  
5
5
RJC  
RJA  
RJA  
Junction-to-Ambient  
Steady State  
90  
50  
90  
50  
°C / W  
t 10 s  
1Pulse width limited by maximum junction temperature.  
2Duty cycle 1%  
RJA when mounted on a 1 in2 pad of 2 oz copper.  
2019/03/01  
p.1