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EDL1216AASA-75 PDF预览

EDL1216AASA-75

更新时间: 2024-09-13 23:50:11
品牌 Logo 应用领域
其他 - ETC 内存集成电路动态存储器时钟
页数 文件大小 规格书
59页 480K
描述
SDRAM|4X2MX16|CMOS|BGA|54PIN|PLASTIC

EDL1216AASA-75 数据手册

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DATA SHEET  
128M bits Mobile RAM  
EDL1216AASA (8M words × 16 bits)  
Description  
Pin Configurations  
The EDL1216AA is a 128M bits Mobile RAM organized  
as 2,097,152 words × 16 bits × 4 banks. The low  
power synchronous DRAMs achieved low power  
consumption and high-speed data transfer using the  
/xxx indicates active low signal.  
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
VSS DQ15 VSSQ  
DQ14 DQ13 VDDQ  
DQ12 DQ11 VSSQ  
DQ10 DQ9 VDDQ  
VDDQ DQ0  
VSSQ DQ2  
VDDQ DQ4  
VSSQ DQ6  
VDD  
DQ1  
DQ3  
DQ5  
pipeline architecture.  
All inputs and outputs are  
synchronized with the positive edge of the clock.  
This product is packaged in 54-ball FBGA.  
Features  
Low power supply  
VDD:  
2.5V ± 0.2V  
VDDQ: 1.8V ± 0.15V  
DQ8  
NC  
VSS  
CKE  
A9  
VDD LDQM DQ7  
/CAS /RAS /WE  
Wide temperature range (25°C to 85°C)  
Programmable partial self refresh  
Programmable driver strength  
UDQM CLK  
G
H
J
NC  
A8  
A11  
A7  
BA0  
A0  
BA1  
A1  
/CS  
A10  
VDD  
Programmable temperature compensated self refresh  
(Option)  
A6  
Deep power down mode  
Small package (54-ball FBGA)  
VSS  
A5  
A4  
A3  
A2  
Fully Synchronous Dynamic RAM, with all signals  
referenced to a positive clock edge  
(Top view)  
Pulsed interface  
A0 to A11  
BA0, BA1  
Address inputs  
Bank Select  
Possible to assert random column address in every  
cycle  
DQ0 to DQ15  
CLK  
Data inputs / outputs  
Clock input  
Quad internal banks controlled by BA0 (A13) and  
BA1 (A12)  
CKE  
Clock enable  
Byte control by LDQM and UDQM  
Wrap sequence = Sequential / Interleave  
/CAS latency (CL) = 2, 3  
/CS  
Chip select  
/RAS  
/CAS  
/WE  
Row address strobe  
Column address strobe  
Write enable  
Automatic precharge and controlled precharge  
Auto refresh and self refresh  
• ×16 organization  
UDQM  
LDQM  
VDD  
Upper DQ mask enable  
Lower DQ mask enable  
Supply voltage  
4,096 refresh cycles/64ms  
Burst termination by Burst stop command and  
Precharge command  
VSS  
Ground  
VDDQ  
VSSQ  
NC  
Supply voltage for DQ  
Ground for DQ  
No connect  
Applications  
Mobile cellular handset, PDA, wireless PDA, handheld  
PC, home electronic appliances, and information  
appliances, etc.  
Document No. E0196E20 (Ver. 2.0)  
Date Published March 2002 (K) Japan  
URL: http://www.elpida.com  
Elpida Memory, Inc. 2001-2002  

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