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DAC5675 PDF预览

DAC5675

更新时间: 2024-09-12 21:55:35
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
28页 440K
描述
14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER

DAC5675 数据手册

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DAC5675  
SLAS352B – DECEMBER 2001 – REVISED JUNE 2002  
14-BIT, 400-MSPS  
DIGITAL-TO-ANALOG CONVERTER  
wireless communication systems, high-frequency  
FEATURES  
direct-digital synthesis (DDS), and waveform  
reconstruction in test and measurement applications.  
The DAC5675 has excellent spurious free dynamic  
range (SFDR) at high intermediate frequencies, which  
makes the DAC5675 well suited for multicarrier  
transmission in TDMA and CDMA based cellular base  
transceiver stations BTS.  
D
D
D
400-MSPS Update Rate  
LVDS-Compatible Input Interface  
Spurious Free Dynamic Range (SFDR) to  
Nyquist  
– 69 dBc at 70-MHz IF, 400 MSPS  
D
W-CDMA Adjacent Channel Power Ratio  
ACPR  
– 73 dBc at 30.72-MHz IF, 122.88 MSPS  
– 71 dBc at 61.44-MHz IF, 245.76 MSPS  
The DAC5675 operates from a single-supply voltage of  
3.3 V. Power dissipation is 820 mW at f = 400 MSPS,  
clk  
f
= 70 MHz. The DAC5675 provides a nominal  
out  
full-scale differential current output of 20 mA,  
supporting both single-ended and differential  
applications. The output current can be directly fed to  
the load with no additional external output buffer  
required. The output is referred to the analog supply  
voltage AVDD.  
D
D
D
D
Differential Scalable Current Outputs: 2 mA to  
20 mA  
On-Chip 1.2-V Reference  
Single 3.3-V Supply Operation  
Power Dissipation: 820 at f  
= 400 MSPS,  
clk  
f
= 70 MHz  
out  
The DAC5675 is manufactured on Texas Instruments  
advanced high-speed mixed-signal BiCMOS process.  
D
Package: 48-Pin HTQFP PowerPad ,  
= 28.8°C/W  
T
JA  
The DAC5675 comprises a LVDS (low-voltage  
differential signaling) interface. LVDS features a low  
differential voltage swing with a low constant power  
consumption across frequency, allowing for high speed  
data transmission with low noise levels, i.e., low  
electromagnetic interference (EMI). LVDS is typically  
implemented in low-voltage digital CMOS processes,  
makingittheidealtechnologyforhigh-speedinterfacing  
between the DAC5675 and high-speed low-voltage  
CMOS ASICs or FPGAs. The DAC5675 current-  
source-arrayarchitecturesupportsupdateratesofupto  
400 MSPS. On-chip edge-triggered input latches  
provide for minimum setup and hold times thereby  
relaxing interface timing.  
APPLICATIONS  
D
Cellular Base Transceiver Station Transmit  
Channel  
– CDMA: WCDMA, CDMA2000, IS–95  
– TDMA: GSM, IS–136, EDGE/GPRS  
– Supports Single-Carrier and Multicarrier  
Applications  
D
Test and Measurement: Arbitrary Waveform  
Generation  
D
D
Direct Digital Synthesis (DDS)  
Cable Modem Headend  
DESCRIPTION  
The DAC5675 is a 14-bit resolution high-speed  
digital-to-analog converter. The DAC5675 is designed  
for high-speed digital data transmission in wired and  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright 2002, Texas Instruments Incorporated  
1
www.ti.com  

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