5秒后页面跳转
捷配首页

Datasheet > DAC5682Z_09
DAC5682Z_09 PDF预览

DAC5682Z_09

更新时间： 2024-11-21 06:52:15
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
59页 2406K
描述
16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)

阅读下载

中文翻译

获取价格

DAC5682Z_09 数据手册

 浏览型号DAC5682Z_09的Datasheet PDF文件第2页浏览型号DAC5682Z_09的Datasheet PDF文件第3页浏览型号DAC5682Z_09的Datasheet PDF文件第4页浏览型号DAC5682Z_09的Datasheet PDF文件第5页浏览型号DAC5682Z_09的Datasheet PDF文件第6页浏览型号DAC5682Z_09的Datasheet PDF文件第7页 
DAC5682Z  
www.ti.com ........................................................................................................................................................ SLLS853C–AUGUST 2007–REVISED JUNE 2009  
16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL  
DIGITAL-TO-ANALOG CONVERTER (DAC)  
1
FEATURES  
DESCRIPTION  
•
•
•
16-Bit Digital-to-Analog Converter (DAC)  
1.0 GSPS Update Rate  
The DAC5682Z is a dual-channel 16-bit 1.0 GSPS  
digital-to-analog converter (DAC) with wideband  
LVDS data input, integrated 2x/4x interpolation filters,  
on-board clock multiplier and internal voltage  
reference. The DAC5682Z offers superior linearity,  
noise, crosstalk and PLL phase noise performance.  
16-Bit Wideband Input LVDS Data Bus  
–
–
8 Sample Input FIFO  
Interleaved I/Q data for Dual-DAC Mode  
•
High Performance  
73 dBc ACLR WCDMA TM1 at 180 MHz  
–
The DAC5682Z integrates a wideband LVDS port  
with on-chip termination. Full-rate input data can be  
transferred to a single DAC channel, or half-rate and  
1/4-rate input data can be interpolated by on-board  
2x or 4x FIR filters. Each interpolation FIR is  
configurable in either Low-Pass or High-Pass mode,  
allowing selection of a higher order output spectral  
image. An on-chip delay lock loop (DLL) simplifies  
LVDS interfacing by providing skew control for the  
LVDS input data clock.  
•
•
2x-32x Clock Multiplying PLL/VCO  
2x or 4x Interpolation Filters  
–
–
Stopband Transition 0.4–0.6 Fdata  
Filters Configurable in Either Low-Pass or  
High-Pass Mode  
–
Allows Selection of Higher Order Image  
•
•
•
•
Fs/4 Coarse Mixer  
On Chip 1.2 V Reference  
The DAC5682Z allows both complex or real output.  
An optional Fs/4 coarse mixer in complex mode  
provides coarse frequency upconversion and the dual  
DAC output produces a complex Hilbert Transform  
pair. An external RF quadrature modulator then  
performs the final single sideband up-conversion.  
Differential Scalable Output: 2 to 20 mA  
Package: 64-Pin 9 × 9 mm QFN  
APPLICATIONS  
•
•
•
•
•
Cellular Base Stations  
Broadband Wireless Access (BWA)  
WiMAX 802.16  
Fixed Wireless Backhaul  
Cable Modem Termination System (CMTS)  
The DAC5682Z is characterized for operation over  
the industrial temperature range of –40°C to 85°C  
and is available in a 64-pin QFN package. Other  
single-channel members of the family include the  
interpolating DAC5681Z  
DAC5681.  
and non-interpolating  
ORDERING INFORMATION  
TA  
ORDER CODE  
DAC5682ZIRGCT  
DAC5682ZIRGCR  
PACKAGE DRAWING/TYPE(1)(2)(3)  
TRANSPORT MEDIA  
Tape and Reel  
QUANTITY  
250  
RGC / 64QFN Quad Flatpack  
No-Lead  
–40°C to 85°C  
Tape and Reel  
2000  
(1) Thermal Pad Size: 7,4 mm × 7,4 mm  
(2) MSL Peak Temperature: Level-3-260C-168 HR  
(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2007–2009, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 
1234567...59

中文翻译

下载PDF

与DAC5682Z_09相关器件

型号 品牌 获取价格 描述 数据表
DAC5682Z_17 TI

获取价格

 		16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-to-Analog Converter (DAC)
DAC5682ZIRGC TI

获取价格

 		暂无描述
DAC5682ZIRGC25 TI

获取价格

 		16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5682ZIRGCR TI

获取价格

 		16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5682ZIRGCRG4 TI

获取价格

 		16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5682ZIRGCT TI

获取价格

 		16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5682ZIRGCTG4 TI

获取价格

 		16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5686 TI

获取价格

 		16-BIT, 500-MSPS, 2X16X INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER
DAC5686IPZP TI

获取价格

 		16-BIT, 500-MSPS, 2X16X INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER
DAC5686PZP TI

获取价格

 		SERIAL, PARALLEL, WORD INPUT LOADING, 16-BIT DAC, PQFP100, PLASTIC, QFP-100

与DAC5682Z_09相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证