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DAC5686

更新时间： 2024-11-20 21:55:27
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
46页 1328K
描述
16-BIT, 500-MSPS, 2X16X INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER

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DAC5686 数据手册

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DAC5686  
www.ti.com  
SLWS147B–APRIL 2003–REVISED AUGUST 2004  
16-BIT, 500-MSPS, 2×–16× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG  
CONVERTER  
FEATURES  
•
•
•
•
On-Chip 1.2-V Reference  
•
500 MSPS Maximum Update Rate DAC  
1.8-V Digital and 3.3-V Analog Supplies  
1.8-V/3.3-V CMOS Compatible Interface  
•
WCDMA ACPR  
– 1 Carrier: 76 dB Centered at 30.72-MHz IF,  
245.76 MSPS  
Power Dissipation: 950 mW at Full Maximum  
Operating Conditions  
– 1 Carrier: 73 dB Centered at 61.44-MHz IF,  
245.76 MSPS  
•
Package: 100-Pin HTQFP  
– 2 Carrier: 72 dB Centered at 30.72-MHz IF,  
245.76 MSPS  
APPLICATIONS  
•
Cellular Base Transceiver Station Transmit  
Channel  
– 4 Carrier: 64 dB Centered at 92.16-MHz IF,  
491.52 MSPS  
– CDMA: W-CDMA, CDMA2000, IS-95  
– TDMA: GSM, IS-136, EDGE/UWC-136  
Baseband I and Q Transmit  
Input Interface: Quadrature Modulation for  
Interfacing With Baseband Complex Mixing  
ASICs  
Single-Sideband Up-Conversion  
Diversity Transmit  
Cable Modem Termination System  
•
Selectable 2×, 4×, 8×, and 16× Interpolation  
– Linear Phase  
•
•
– 0.05-dB Pass-Band Ripple  
– 80-dB Stop-Band Attenuation  
– Stop-Band Transition 0.4–0.6 fDATA  
32-Bit Programmable NCO  
•
•
•
•
•
On-Chip 2×–16× PLL Clock Multiplier With  
Bypass Mode  
•
Differential Scalable Current Outputs: 2 mA to  
20 mA  
DESCRIPTION  
The DAC5686 is a dual-channel 16-bit high-speed digital-to-analog converter (DAC) with integrated 2×, 4×, 8×,  
and 16× interpolation filters, a numerically controlled oscillator (NCO), onboard clock multiplier, and on-chip  
voltage reference. The DAC5686 has been specifically designed to allow for low input data rates between the  
DAC and ASIC, or FPGA, and high output transmit intermediate frequencies (IF). Target applications include  
high-speed digital data transmission in wired and wireless communication systems and high-frequency  
direct-digital synthesis DDS.  
The DAC5686 provides three modes of operation: dual-channel, single-sideband, and quadrature modulation. In  
dual-channel mode, interpolation filtering increases the DAC update rate, which reduces sinx/x rolloff and  
enables the use of relaxed analog post-filtering.  
Single-sideband mode provides an alternative interface to the analog quadrature modulators. Channel carrier  
selection is performed at baseband by mixing in the ASIC/FPGA. Baseband I and Q from the ASIC/FPGA are  
input to the DAC5686, which in turn performs a complex mix resulting in Hilbert transform pairs at the outputs of  
the DAC5686's two DACs. An external RF quadrature modulator then performs the final single-sideband  
up-conversion. The DAC5686's complex mixing frequencies are flexibly chosen with the 32-bit programmable  
NCO.  
Unmatched gains and offsets at the RF quadrature modulator result in unwanted sideband and local oscillator  
feedthrough. Each DAC in the DAC5686 has an 11-bit offset adjustment and 12-bit gain adjustment, which  
compensate for quadrature modulator input imbalances, thus reducing RF filtering requirements.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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