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DAC5686IPZP PDF预览

DAC5686IPZP

更新时间: 2024-11-03 21:55:27
品牌 Logo 应用领域
德州仪器 - TI 转换器数模转换器
页数 文件大小 规格书
46页 1328K
描述
16-BIT, 500-MSPS, 2X16X INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER

DAC5686IPZP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:HTFQFP, TQFP100,.63SQ针数:100
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.2
Is Samacsys:N最大模拟输出电压:4.1 V
最小模拟输出电压:2.5 V转换器类型:D/A CONVERTER
输入位码:2'S COMPLEMENT BINARY输入格式:SERIAL, PARALLEL, WORD
JESD-30 代码:S-PQFP-G100JESD-609代码:e4
长度:14 mm最大线性误差 (EL):0.018%
湿度敏感等级:3位数:16
功能数量:1端子数量:100
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HTFQFP
封装等效代码:TQFP100,.63SQ封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.8,3.3 V认证状态:Not Qualified
采样速率:500 MHz座面最大高度:1.2 mm
标称安定时间 (tstl):0.012 µs子类别:Other Converters
最大压摆率:55 mA标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mmBase Number Matches:1

DAC5686IPZP 数据手册

 浏览型号DAC5686IPZP的Datasheet PDF文件第2页浏览型号DAC5686IPZP的Datasheet PDF文件第3页浏览型号DAC5686IPZP的Datasheet PDF文件第4页浏览型号DAC5686IPZP的Datasheet PDF文件第5页浏览型号DAC5686IPZP的Datasheet PDF文件第6页浏览型号DAC5686IPZP的Datasheet PDF文件第7页 
DAC5686  
www.ti.com  
SLWS147BAPRIL 2003REVISED AUGUST 2004  
16-BIT, 500-MSPS, 2×16× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG  
CONVERTER  
FEATURES  
On-Chip 1.2-V Reference  
500 MSPS Maximum Update Rate DAC  
1.8-V Digital and 3.3-V Analog Supplies  
1.8-V/3.3-V CMOS Compatible Interface  
WCDMA ACPR  
– 1 Carrier: 76 dB Centered at 30.72-MHz IF,  
245.76 MSPS  
Power Dissipation: 950 mW at Full Maximum  
Operating Conditions  
– 1 Carrier: 73 dB Centered at 61.44-MHz IF,  
245.76 MSPS  
Package: 100-Pin HTQFP  
– 2 Carrier: 72 dB Centered at 30.72-MHz IF,  
245.76 MSPS  
APPLICATIONS  
Cellular Base Transceiver Station Transmit  
Channel  
– 4 Carrier: 64 dB Centered at 92.16-MHz IF,  
491.52 MSPS  
– CDMA: W-CDMA, CDMA2000, IS-95  
– TDMA: GSM, IS-136, EDGE/UWC-136  
Baseband I and Q Transmit  
Input Interface: Quadrature Modulation for  
Interfacing With Baseband Complex Mixing  
ASICs  
Single-Sideband Up-Conversion  
Diversity Transmit  
Cable Modem Termination System  
Selectable 2×, 4×, 8×, and 16× Interpolation  
– Linear Phase  
– 0.05-dB Pass-Band Ripple  
– 80-dB Stop-Band Attenuation  
– Stop-Band Transition 0.4–0.6 fDATA  
32-Bit Programmable NCO  
On-Chip 2×–16× PLL Clock Multiplier With  
Bypass Mode  
Differential Scalable Current Outputs: 2 mA to  
20 mA  
DESCRIPTION  
The DAC5686 is a dual-channel 16-bit high-speed digital-to-analog converter (DAC) with integrated 2×, 4×, 8×,  
and 16× interpolation filters, a numerically controlled oscillator (NCO), onboard clock multiplier, and on-chip  
voltage reference. The DAC5686 has been specifically designed to allow for low input data rates between the  
DAC and ASIC, or FPGA, and high output transmit intermediate frequencies (IF). Target applications include  
high-speed digital data transmission in wired and wireless communication systems and high-frequency  
direct-digital synthesis DDS.  
The DAC5686 provides three modes of operation: dual-channel, single-sideband, and quadrature modulation. In  
dual-channel mode, interpolation filtering increases the DAC update rate, which reduces sinx/x rolloff and  
enables the use of relaxed analog post-filtering.  
Single-sideband mode provides an alternative interface to the analog quadrature modulators. Channel carrier  
selection is performed at baseband by mixing in the ASIC/FPGA. Baseband I and Q from the ASIC/FPGA are  
input to the DAC5686, which in turn performs a complex mix resulting in Hilbert transform pairs at the outputs of  
the DAC5686's two DACs. An external RF quadrature modulator then performs the final single-sideband  
up-conversion. The DAC5686's complex mixing frequencies are flexibly chosen with the 32-bit programmable  
NCO.  
Unmatched gains and offsets at the RF quadrature modulator result in unwanted sideband and local oscillator  
feedthrough. Each DAC in the DAC5686 has an 11-bit offset adjustment and 12-bit gain adjustment, which  
compensate for quadrature modulator input imbalances, thus reducing RF filtering requirements.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

DAC5686IPZP 替代型号

型号 品牌 替代类型 描述 数据表
DAC5687IPZPR TI

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