Datasheet > CXK79M18C165GB-5

CXK79M18C165GB-5

更新时间： 2024-11-09 04:26:43

品牌	Logo	应用领域
索尼 - SONY		静态存储器
页数	文件大小	规格书
30页	516K
描述
Standard SRAM, 1MX18, 2.3ns, CMOS, PBGA209, 14 X 22 MM, PLASTIC, BGA-209

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

CXK79M18C165GB-5 数据手册

CXK79M72C165GB CXK79M18C165GB

CXK79M36C165GB

SONY ΣRAM

33/4/5

18Mb 1x1Dp LVCMOS High Speed Synchronous SRAMs (256Kb x 72 or 512Kb x 36 or 1Mb x 18)

Preliminary

Description

The CXK79M72C165GB (organized as 262,144 words by 72 bits), CXK79M36C165GB (organized as 524,288 words by 36

bits), and the CXK79M18C165GB (organized as 1,048,576 words by 18 bits) are high speed CMOS synchronous static RAMs

with common I/O pins. They are manufactured in compliance with the JEDEC-standard 209 pin BGA package pinouts defined

for SigmaRAMs. They integrate input registers, high speed RAM, output registers, and a two-deep write buffer onto a single

monolithic IC. Single Data Rate (SDR) Pipelined (PL) read operations and Double Late Write (DLW) write operations are sup-

ported, providing a high-performance user interface. Positive and negative output clocks are provided for applications requiring

source-synchronous operation.

All address and control input signals are registered on the rising edge of the CK input clock.

During read operations, output data is driven valid once, from the rising edge of CK, one full cycle after the address and control

signals are registered.

During write operations, input data is registered once, on the rising edge of CK, two full cycles after the address and control

signals are registered.

Output drivers are series-terminated, and output impedance is selectable via the ZQ control pin. When ZQ is tied “low”, the

impedance of the SRAM’s output drivers is set to ~25Ω. When ZQ is tied “high” or left unconnected, the impedance of the

SRAM’s output drivers is set to ~50Ω.

300 MHz operation (300 Mbps) is obtained from a single 1.8V power supply. JTAG boundary scan interface is provided using

a subset of IEEE standard 1149.1 protocol.

Features

•

3 Speed Bins

Cycle Time / Data Access Time

3.3ns / 1.8ns

-33

-4

4.0ns / 2.1ns

-5

5.0ns / 2.3ns

• Single 1.8V power supply (V_DD): 1.7V (min) to 1.95V (max)

• Dedicated output supply voltage (V_DDQ): 1.4V (min) to V_DD(max)

• LVCMOS-compatible I/O interface

• Common I/O

• Single Data Rate (SDR) data transfers

• Pipelined (PL) read operations

• Double Late Write (DLW) write operations

• Burst capability with internally controlled Linear Burst address sequencing

• Burst length of two, three, or four, with automatic address wrap

• Full read/write data coherency

• Byte write capability

• Single-ended input clock (CK)

• Data-referenced output clocks (CQ1, CQ1, CQ2, CQ2)

• Selectable output driver impedance via dedicated control pin (ZQ)

• Depth expansion capability (2 or 4 banks) via programmable chip enables (E2, E3, EP2, EP3)

• JTAG boundary scan (subset of IEEE standard 1149.1)

• 209 pin (11x19), 1mm pitch, 14mm x 22mm Ball Grid Array (BGA) package

18Mb 1x1Dp, LVCMOS, rev 1.0

1 / 30

July 19, 2002

12 3 4 5 6 7...30

中文翻译

下载PDF

与CXK79M18C165GB-5相关器件

型号	品牌	获取价格	描述	数据表
CXK79M36C160GB	ETC	获取价格	MEMORY-SigmaRAM 16Meg 1x1 HSTL I/O (512K x 36) (27 pages 364K Rev. 7/6/01)
CXK79M36C160GB-4	SONY	获取价格	Standard SRAM, 512KX36, 2.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C160GB-44	SONY	获取价格	Standard SRAM, 512KX36, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C160GB-5	SONY	获取价格	Standard SRAM, 512KX36, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C161GB	ETC	获取价格	MEMORY-SigmaRAM 16Meg 1x1 LVCMOS I/O (512K x 36) (27 pages 364K Rev. 7/6/01)
CXK79M36C161GB-33	SONY	获取价格	Standard SRAM, 512KX36, 1.8ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C161GB-4	SONY	获取价格	Standard SRAM, 512KX36, 2.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C161GB-44	SONY	获取价格	Standard SRAM, 512KX36, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C162GB	SONY	获取价格	18Mb 1x2Lp HSTL High Speed Synchronous SRAMs (512Kb x 36)
CXK79M36C162GB-33	SONY	获取价格	18Mb 1x2Lp HSTL High Speed Synchronous SRAMs (512Kb x 36)

与CXK79M18C165GB-5相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

21
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

20
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

44
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

38

产品中心

服务支持

精选活动

关于我们

帮助中心

CXK79M18C165GB-5

CXK79M18C165GB-5 数据手册

与CXK79M18C165GB-5相关器件

与CXK79M18C165GB-5相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CXK79M18C165GB-5

CXK79M18C165GB-5 数据手册

与CXK79M18C165GB-5相关器件

与CXK79M18C165GB-5相关文章

您还可以找

您在本页遇到什么问题？