Datasheet > CXK79M36C163GB

CXK79M36C163GB

更新时间： 2024-11-09 23:44:43

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
27页	433K
描述
MEMORY-SigmaRAM 16Meg 1x2 LVCMOX I/O (512K x 36) (25 pages 360K Rev. 7/6/01)

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CXK79M36C163GB 数据手册

SONY ΣRAM CXK79M36C163GB / CXK79M18C163GB 33/4/5

18Mb 1x2Lp LVCMOS High Speed Synchronous SRAMs (512Kb x 36 or 1Mb x 18)

Preliminary

Description

The CXK79M36C163GB (organized as 524,288 words by 36 bits) and the CXK79M18C163GB (organized as 1,048,576 words

by 18 bits) are high speed CMOS synchronous static RAMs with common I/O pins. They are manufactured in compliance with

the JEDEC-standard 209 pin BGA package pinouts defined for SigmaRAMs. They integrate input registers, high speed RAM,

output registers, and a two-deep write buffer onto a single monolithic IC. Double Data Rate (DDR) Pipelined (PL) read opera-

tions and Late Write (LW) write operations are supported, providing a high-performance user interface. Positive and negative

output clocks are provided for applications requiring source-synchronous operation.

All address and control input signals are registered on the rising edge of the CK input clock.

During read operations, output data is driven valid twice, from both the rising and falling edges of CK, beginning one full cycle

after the address and control signals are registered.

During write operations, input data is registered twice, on both the rising and falling edges of CK, beginning one full cycle after

the address and control signals are registered.

Because two pieces of data are always transferred during read and write operations, the least significant address bit of the in-

ternal memory array is not available as an external address pin to these devices. Consequently, the number of external address

pins available to each device is one less than the specified depth of the device (i.e. the 512Kb x 36 device has 18, not 19, external

address pins, and the 1Mb x 18 device has 19, not 20, external address pins). And, the user cannot choose the order in which

the two pieces of data are read. Read data is always provided in the same order in which it is written.

Output drivers are series-terminated, and output impedance is selectable via the ZQ control pin. When ZQ is tied “low”, the

impedance of the SRAM’s output drivers is set to ~25Ω. When ZQ is tied “high” or left unconnected, the impedance of the

SRAM’s output drivers is set to ~50Ω.

300 MHz operation (600 Mbps) is obtained from a single 1.8V power supply. JTAG boundary scan interface is provided using

a subset of IEEE standard 1149.1 protocol.

Features

•

3 Speed Bins

Cycle Time / Data Access Time

3.3ns / 1.8ns

-33

-4

4.0ns / 2.1ns

-5

5.0ns / 2.3ns

• Single 1.8V power supply (V_DD): 1.7V (min) to 1.95V (max)

• Dedicated output supply voltage (V_DDQ): 1.4V (min) to V_DD(max)

• LVCMOS-compatible I/O interface

• Common I/O

• Double Data Rate (DDR) data transfers

• Pipelined (PL) read operations

• Late Write (LW) write operations

• Burst capability with internally controlled Linear Burst address sequencing

• Burst length of two or four, with automatic address wrap

• Full read/write data coherency

• Single-ended input clock (CK)

• Data-referenced output clocks (CQ1, CQ1, CQ2, CQ2)

• Selectable output driver impedance via dedicated control pin (ZQ)

• Depth expansion capability (2 or 4 banks) via programmable chip enables (E2, E3, EP2, EP3)

• JTAG boundary scan (subset of IEEE standard 1149.1)

• 209 pin (11x19), 1mm pitch, 14mm x 22mm Ball Grid Array (BGA) package

18Mb 1x2Lp, LVCMOS, rev 1.0

1 / 27

July 19, 2002

12 3 4 5 6 7...27

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与CXK79M36C163GB相关器件

型号	品牌	获取价格	描述	数据表
CXK79M36C163GB-4	SONY	获取价格	Standard SRAM, 512KX36, 2.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C163GB-44	SONY	获取价格	Standard SRAM, 512KX36, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C163GB-5	SONY	获取价格	Standard SRAM, 512KX36, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C164GB	SONY	获取价格	18Mb 1x1Dp HSTL High Speed Synchronous SRAMs (256Kb x 72 or 512Kb x 36)
CXK79M36C164GB-28	SONY	获取价格	Standard SRAM, 512KX36, 1.7ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C164GB-33	SONY	获取价格	Standard SRAM, 512KX36, 1.9ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C164GB-44	SONY	获取价格	Standard SRAM, 512KX36, 3.2ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C164GB-5	SONY	获取价格	Standard SRAM, 512KX36, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M36C165GB	SONY	获取价格	18Mb 1x1Dp LVCMOS High Speed Synchronous SRAMs (256Kb x 72 or 512Kb x 36)
CXK79M36C165GB-3	SONY	获取价格	Standard SRAM, 512KX36, 2ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209

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