Datasheet > CXK79M72C161GB

CXK79M72C161GB

更新时间： 2024-11-29 23:44:43

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
30页	513K
描述
MEMORY-SigmaRAM 16Meg 1x1 LVCMOS I/O (256K x 72) (27 pages 364K Rev. 7/6/01)

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CXK79M72C161GB 数据手册

CXK79M72C161GB CXK79M18C161GB

CXK79M36C161GB

SONY ΣRAM

33/4/5

18Mb 1x1Lp LVCMOS High Speed Synchronous SRAMs (256Kb x 72 or 512Kb x 36 or 1Mb x 18)

Preliminary

Description

The CXK79M72C161GB (organized as 262,144 words by 72 bits), CXK79M36C161GB (organized as 524,288 words by 36

bits), and the CXK79M18C161GB (organized as 1,048,576 words by 18 bits) are high speed CMOS synchronous static RAMs

with common I/O pins. They are manufactured in compliance with the JEDEC-standard 209 pin BGA package pinouts defined

for SigmaRAMs. They integrate input registers, high speed RAM, output registers, and a two-deep write buffer onto a single

monolithic IC. Single Data Rate (SDR) Pipelined (PL) read operations and Late Write (LW) write operations are supported,

providing a high-performance user interface. Positive and negative output clocks are provided for applications requiring source-

synchronous operation.

All address and control input signals are registered on the rising edge of the CK input clock.

During read operations, output data is driven valid once, from the rising edge of CK, one full cycle after the address and control

signals are registered.

During write operations, input data is registered once, on the rising edge of CK, one full cycle after the address and control

signals are registered.

Output drivers are series-terminated, and output impedance is selectable via the ZQ control pin. When ZQ is tied “low”, the

impedance of the SRAM’s output drivers is set to ~25Ω. When ZQ is tied “high” or left unconnected, the impedance of the

SRAM’s output drivers is set to ~50Ω.

300 MHz operation (300 Mbps) is obtained from a single 1.8V power supply. JTAG boundary scan interface is provided using

a subset of IEEE standard 1149.1 protocol.

Features

•

3 Speed Bins

Cycle Time / Data Access Time

3.3ns / 1.8ns

-33

-4

4.0ns / 2.1ns

-5

5.0ns / 2.3ns

• Single 1.8V power supply (V_DD): 1.7V (min) to 1.95V (max)

• Dedicated output supply voltage (V_DDQ): 1.4V (min) to V_DD(max)

• LVCMOS-compatible I/O interface

• Common I/O

• Single Data Rate (SDR) data transfers

• Pipelined (PL) read operations

• Late Write (LW) write operations

• Burst capability with internally controlled Linear Burst address sequencing

• Burst length of two, three, or four, with automatic address wrap

• Full read/write data coherency

• Byte write capability

• Single-ended input clock (CK)

• Data-referenced output clocks (CQ1, CQ1, CQ2, CQ2)

• Selectable output driver impedance via dedicated control pin (ZQ)

• Depth expansion capability (2 or 4 banks) via programmable chip enables (E2, E3, EP2, EP3)

• JTAG boundary scan (subset of IEEE standard 1149.1)

• 209 pin (11x19), 1mm pitch, 14mm x 22mm Ball Grid Array (BGA) package

18Mb 1x1Lp, LVCMOS, rev 1.0

1 / 30

July 19, 2002

12 3 4 5 6 7...30

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与CXK79M72C161GB相关器件

型号	品牌	获取价格	描述	数据表
CXK79M72C161GB-33	SONY	获取价格	Standard SRAM, 256KX72, 1.8ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M72C161GB-44	SONY	获取价格	Standard SRAM, 256KX72, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M72C161GB-5	SONY	获取价格	Standard SRAM, 256KX72, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M72C164GB	SONY	获取价格	18Mb 1x1Dp HSTL High Speed Synchronous SRAMs (256Kb x 72 or 512Kb x 36)
CXK79M72C164GB-3	SONY	获取价格	Standard SRAM, 256KX72, 1.9ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M72C164GB-33	SONY	获取价格	Standard SRAM, 256KX72, 1.9ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M72C165GB	SONY	获取价格	18Mb 1x1Dp LVCMOS High Speed Synchronous SRAMs (256Kb x 72 or 512Kb x 36)
CXK79M72C165GB-4	SONY	获取价格	Standard SRAM, 256KX72, 2.1ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXK79M72C165GB-5	SONY	获取价格	Standard SRAM, 256KX72, 2.3ns, CMOS, PBGA209, 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-209
CXL02TG3	TELEDYNE	获取价格	High Stability

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