5秒后页面跳转
CDCM7005ZVAT PDF预览

CDCM7005ZVAT

更新时间: 2024-11-17 22:06:23
品牌 Logo 应用领域
德州仪器 - TI 时钟
页数 文件大小 规格书
40页 1489K
描述
3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER

CDCM7005ZVAT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:LFBGA,针数:64
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.1
其他特性:USER DEFINABLE FIVE DIFFERENTIAL LVPECL OUTPUT; DIFFERENTIAL VCO IN CLOCK系列:7005
输入调节:SCHMITT TRIGGER MUXJESD-30 代码:S-PBGA-B64
JESD-609代码:e1长度:8 mm
负载电容(CL):10 pF逻辑集成电路类型:PLL BASED CLOCK DRIVER
最大I(ol):0.008 A湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:64实输出次数:5
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH包装方法:TR
峰值回流温度(摄氏度):260最大电源电流(ICC):260 mA
传播延迟(tpd):3 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):2.4 ns座面最大高度:1.4 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8 mm最小 fmax:1500 MHz
Base Number Matches:1

CDCM7005ZVAT 数据手册

 浏览型号CDCM7005ZVAT的Datasheet PDF文件第2页浏览型号CDCM7005ZVAT的Datasheet PDF文件第3页浏览型号CDCM7005ZVAT的Datasheet PDF文件第4页浏览型号CDCM7005ZVAT的Datasheet PDF文件第5页浏览型号CDCM7005ZVAT的Datasheet PDF文件第6页浏览型号CDCM7005ZVAT的Datasheet PDF文件第7页 
CDCM7005  
www.ti.com  
SCAS793AJUNE 2005REVISED JUNE 2005  
3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER  
FEATURES  
or 48-Pin QFN (RGZ)  
High Performance LVPECL and LVCMOS PLL  
Clock Synchronizer  
Industrial Temperature Range –40°C to 85°C  
PIN ASSIGNMENTS (TOP VIEW)  
Two Reference Clock Inputs (Primary and  
Secondary Clock) for Redundancy Support  
With Manual or Automatic Selection  
1
2
3
4
5
6
7
8
CTRL_  
A
B
C
D
E
F
PRI_REF REF_SEL VCC_CP CP_OUT CTRL_LE CTRL_CLK  
PLL_LOCK  
DATA  
Accepts LVCMOS Input Frequencies Up to  
200 MHz  
SEC_REF  
GND  
GND  
GND  
GND  
GND  
VCC  
Y1A  
GND  
AVCC  
GND  
VCC  
GND  
VCC  
Y1B  
GND  
AVCC  
GND  
VCC  
GND  
VCC  
Y2A  
GND  
AVCC  
GND  
VCC  
GND  
VCC  
Y2B  
GND  
AVCC  
GND  
VCC  
GND  
VCC  
Y3A  
GND  
AVCC  
VCC  
VCC  
VCC  
VCC  
Y3B  
GND  
VCXO_IN Clock is Synchronized to One of the  
Two Reference Clocks  
STATUS_  
REF or  
PRI_SEC_  
CLK  
VBB  
VCXO_IN Frequencies Up to 2.2 GHz  
(LVPECL)  
STATUS_  
VCXO  
or  
VCXO_IN  
VCXO_IN  
Y0A  
I_REF_CP  
Outputs Can Be a Combination of LVPECL  
and LVCMOS (Up to Five Differential LVPECL  
Outputs or Up to 10 LVCMOS Outputs)  
VCC  
Y4B  
Y4A  
Output Frequency is Selectable by x1, /2, /3,  
/4, /6, /8, /16 on Each Output Individually  
Efficient Jitter Cleaning From Low PLL Loop  
Bandwidth  
Y0B  
G
RESET  
or  
Low Phase Noise PLL Core  
PD  
H
HOLD  
Programmable Phase Offset (PRI_REF and  
SEC_REF to Outputs)  
P0022-01  
Wide Charge Pump Current Range From 200  
µA to 3 mA  
Dedicated Charge Pump Supply (VCC_CP) for  
Wide Tuning Voltage Range VCOs  
36 35 34 33 32 31 30 29 28 27 26 25  
37  
GND  
SEC_REF  
AVCC  
AVCC  
VBB  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Presets Charge Pump to VCC_CP/2 for Fast  
Center-Frequency Setting of VC(X)O  
STATUS_REF or  
PRI_SEC_CLK  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
STATUS_VCXO or  
I_REF_CP  
VCC  
VCC  
VCC  
VCC  
Y4B  
Y4A  
VCC  
Analog and Digital PLL Lock Indication  
VCC  
Provides VBB Bias Voltage Output for  
Single-Ended Input Signals (VCXO_IN)  
Thermal Pad  
must be  
VCXO_IN  
VCXO_IN  
VCC  
soldered to GND  
Frequency Hold-Over Mode Improves  
Fail-Safe Operation  
VCC  
Y0A  
RESET or  
HOLD  
Power-Up Control Forces LVPECL Outputs to  
3-State at VCC < 1.5 V  
Y0B  
VCC  
VCC  
1
2
3
4
5
6
7
8
9
10 11 12  
SPI Controllable Device Setting  
3.3-V Power Supply  
P0023-01  
Packaged in 64-Pin BGA (0,8 mm Pitch – ZVA)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2005, Texas Instruments Incorporated  

CDCM7005ZVAT 替代型号

型号 品牌 替代类型 描述 数据表
CDCM7005ZVAR TI

完全替代

3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER
CDCM7005ZVA TI

类似代替

3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER

与CDCM7005ZVAT相关器件

型号 品牌 获取价格 描述 数据表
CDCM9102 TI

获取价格

Low-Noise Two-Channel 100-MHz Clock Generator
CDCM9102_1209 TI

获取价格

Low-Noise Two-Channel 100-MHz Clock Generator
CDCM9102RHBR TI

获取价格

Low-Noise Two-Channel 100-MHz Clock Generator
CDCM9102RHBT TI

获取价格

Low-Noise Two-Channel 100-MHz Clock Generator
CDCP1803 TI

获取价格

1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
CDCP1803-EP TI

获取价格

1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
CDCP1803MRGETEP TI

获取价格

1:3 LVPECL CLOCK BUFFER WITH PROGRAMMABLE DIVIDER
CDCP1803RGER TI

获取价格

1:3 LVPECL Clock Buffer with Programable Divider 24-VQFN -40 to 85
CDCP1803RGERG4 TI

获取价格

1:3 LVPECL Clock Buffer with Programable Divider 24-VQFN -40 to 85
CDCP1803RGET TI

获取价格

具有可编程分频器的 1:3 LVPECL 时钟缓冲器 | RGE | 24 | -40 t