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CDCM6208_14 PDF预览

CDCM6208_14

更新时间: 2024-11-19 02:58:39
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德州仪器 - TI /
页数 文件大小 规格书
78页 2394K
描述
2:8 Clock Generator, Jitter Cleaner With Fractional Dividers

CDCM6208_14 数据手册

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CDCM6208  
www.ti.com  
SCAS931A MAY 2012REVISED JUNE 2012  
2:8 CLOCK GENERATOR, JITTER CLEANER WITH FRACTIONAL DIVIDERS  
Check for Samples: CDCM6208  
1
FEATURES  
2
Superior Performance with Low Power:  
Fractional Output Divider Achieve 0 ppm to  
< 1 ppm Frequency Error and Eliminates  
need for Crystal Oscillators and Other  
Clock Generators  
Low Noise Synthesizer (265 fs-rms Typical  
Jitter) or Low Noise Jitter Cleaner (1.6 ps-  
rms Typical Jitter)  
Output frequencies up to 800 MHz  
0.5 W Typical Power Consumption  
Two Differential Inputs, XTAL Support, Ability  
for Smart Switching  
SPI, I2C™, and Pin Programmable  
High Channel-to-Channel Isolation and  
Excellent PSRR  
Device Performance Customizable Through  
Flexible 1.8 V, 2.5 V and 3.3 V Power  
Supplies, Allowing Mixed Output Voltages  
Professional user GUI for Quick Design  
Turnaround  
Flexible Frequency Planning:  
7 x 7 mm 48-QFN package (RGZ)  
-40 °C to 85 °C temperature range  
4x Integer Down-divided Differential Clock  
Outputs Supporting LVPECL-like, CML, or  
LVDS-like Signaling  
APPLICATIONS  
4x Fractional or Integer Divided Differential  
Clock Outputs Supporting HCSL, LVDS-like  
Signaling, or Eight CMOS Outputs  
Base Band Clocking (Wireless Infrastructure)  
Networking and Data Communications  
Keystone C66x Multicore DSP Clocking  
Storage Server, Portable Test Equipment,  
Medical Imaging, High End A/V  
DESCRIPTION  
The CDCM6208 is a highly versatile, low jitter low power frequency synthesizer which can generate eight low  
jitter clock outputs, selectable between LVPECL-like high-swing CML, normal-swing CML, LVDS-like low-power  
CML, HCSL, or LVCMOS, from one of two inputs that can feature a low frequency crystal or CML, LVPECL,  
LVDS, or LVCMOS signals for a variety of wireless infrastructure baseband, wireline data communication,  
computing, low power medical imaging and portable test and measurement applications. The CDCM6208 also  
features an innovative fractional divider architecture for four of its outputs that can generate any frequency with  
better than 1ppm frequency accuracy. The CDCM6208 can be easily configured through I2C or SPI programming  
interface and in the absence of serial interface, pin mode is also available that can set the device in 1 of 32  
distinct pre-programmed configurations using control pins.  
Timing  
FBADC  
RXADC  
Core  
SyncE  
TXDAC  
Packet  
1pps  
GPS receiver  
DR  
Packet PCIe  
Accel  
network  
RF LO  
CDCM6208  
DPLL  
APLL  
IEEE1588  
timing extract  
1pps  
RF LO  
CDCM6208  
Ethernet  
TMS320TCI6616/18  
DSP  
Synthesizer  
Mode  
Pico Cell Clocking  
AIF  
ALT  
SRIO  
CORE  
Base Band DSP  
Clocking  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
I2C is a trademark of NXP B.V. Corporation.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2012, Texas Instruments Incorporated  
 

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