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ADP5042ACPZ-2-R7

更新时间： 2024-02-15 19:16:09
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
33页 1425K
描述
Micro PMU with 0.8 A Buck, Two 300 mA LDOs, Supervisory, Watchdog and Manual Reset

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ADP5042ACPZ-2-R7 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC20,.16SQ,20针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.68
可调阈值：YES模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：S-XQCC-N20JESD-609代码：e3
长度：4 mm湿度敏感等级：3
信道数量：2功能数量：1
端子数量：20最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC20,.16SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：2.3/5.5 V
认证状态：Not Qualified座面最大高度：0.8 mm
子类别：Power Management Circuits最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：3.6 V
表面贴装：YES温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4 mm
Base Number Matches：1

ADP5042ACPZ-2-R7 数据手册

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Micro PMU with 0.8 A Buck, Two 300 mA LDOs  
Supervisory, Watchdog and Manual Reset  
Data Sheet  
ADP5042  
FEATURES  
HIGH LEVEL BLOCK DIAGRAM  
Input voltage range: 2.3 V to 5.5 V  
One 0.8 A buck regulator  
Two 300 mA LDOs  
20-lead, 4 mm × 4 mm LFCSP package  
Initial regulator accuracy: 1%  
Overcurrent and thermal protection  
Soft start  
R
= 30Ω  
FILT  
AVIN  
L1  
1µH  
AVIN  
VIN1  
SW  
V
AT  
OUT1  
800mA  
VOUT1  
PGND  
VIN1 = 2.3V  
TO 5.5V  
C6  
BUCK  
EN_BK  
10µF  
C5  
4.7µF  
ON  
FPWM  
MODE  
EN1  
OFF  
OFF  
PSM/PWM  
VOUT2  
V
AT  
OUT2  
300mA  
LDO1  
(DIGITAL)  
VIN2  
VIN2 = 1.7V  
TO 5.5V  
C1  
1µF  
C2  
1µF  
EN_LDO1  
ON  
ON  
WSTAT  
nRSTO  
EN2  
AVIN  
Undervoltage lockout  
WDI1  
WDI2  
MR  
Open drain processor reset with threshold monitoring  
1.5% threshold accuracy over the full temperate range  
Guaranteed reset output valid to VCC = 1 V  
Dual watchdog for secure systems  
Watchdog 1 controls reset  
EN3  
OFF  
EN_LDO2  
VOUT3  
VIN3  
V
AT  
VIN3 = 1.7V  
TO 5.5V  
OUT3  
300mA  
LDO2  
(ANALOG)  
C3  
1µF  
C4  
1µF  
AGND  
Watchdog 2 controls reset and regulators power cycle  
Buck key specifications  
Figure 1.  
Current mode topology for excellent transient response  
3 MHz operating frequency  
Uses tiny multilayer inductors and capacitors  
Mode pin selects forced PWM or auto PFM/PSM modes  
100% duty cycle low dropout mode  
LDOs key specifications  
Low VIN from 1.7 V to 5.5 V  
Stable with1 µF ceramic output capacitors  
High PSRR, 60 dB PSRR up to 1 kHz/10 kHz  
Low output noise  
110 µV rms typical output noise at VOUT = 2.8 V  
Low dropout voltage: 150 mV at 300 mA load  
−40°C to +125°C junction temperature range  
GENERAL DESCRIPTION  
The ADP5042 combines one high performance buck regulator  
and two low dropout regulators (LDO) in a small 20-lead  
LFCSP to meet demanding performance and board space  
requirements.  
The low quiescent current, low dropout voltage, and wide input  
voltage range of the ADP5042 LDOs extend the battery life of  
portable devices. The two LDOs maintain power supply  
rejection greater than 60 dB for frequencies as high as 10 kHz  
while operating with a low headroom voltage.  
The high switching frequency of the buck regulator enables  
use of tiny multilayer external components and minimizes the  
board space.  
Each regulator is activated by a high level on the respective  
enable pin. The ADP5042 is available with factory programmable  
default output voltages and can be set to a wide range of options.  
The MODE pin selects the buck mode of operation. When set  
to logic high, the buck regulators operate in forced PWM mode.  
When the MODE pin is set to logic low, the buck regulators  
operate in PWM mode when the load is around the nominal  
value. When the load current falls below a predefined threshold  
the regulator operates in power save mode (PSM) improving  
the light-load efficiency.  
The ADP5042 contains supervisory circuits that monitor  
power supply voltage levels and code execution integrity in  
microprocessor-based systems. They also provide power-on  
reset signals. An on-chip dual watchdog timer can reset the  
microprocessor or power cycle the system (Watchdog 2) if it  
fails to strobe within a preset timeout period.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2010-2011 Analog Devices, Inc. All rights reserved.  
 
 
 
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