Micro PMU with 0.8 A Buck, Two 300 mA LDOs
Supervisory, Watchdog and Manual Reset
Data Sheet
ADP5042
FEATURES
HIGH LEVEL BLOCK DIAGRAM
Input voltage range: 2.3 V to 5.5 V
One 0.8 A buck regulator
Two 300 mA LDOs
20-lead, 4 mm × 4 mm LFCSP package
Initial regulator accuracy: 1%
Overcurrent and thermal protection
Soft start
R
= 30Ω
FILT
AVIN
L1
1µH
AVIN
VIN1
SW
V
AT
OUT1
800mA
VOUT1
PGND
VIN1 = 2.3V
TO 5.5V
C6
BUCK
EN_BK
10µF
C5
4.7µF
ON
FPWM
MODE
EN1
OFF
OFF
PSM/PWM
VOUT2
V
AT
OUT2
300mA
LDO1
(DIGITAL)
VIN2
VIN2 = 1.7V
TO 5.5V
C1
1µF
C2
1µF
EN_LDO1
ON
ON
WSTAT
nRSTO
EN2
AVIN
Undervoltage lockout
WDI1
WDI2
MR
Open drain processor reset with threshold monitoring
1.5% threshold accuracy over the full temperate range
Guaranteed reset output valid to VCC = 1 V
Dual watchdog for secure systems
Watchdog 1 controls reset
EN3
OFF
EN_LDO2
VOUT3
VIN3
V
AT
VIN3 = 1.7V
TO 5.5V
OUT3
300mA
LDO2
(ANALOG)
C3
1µF
C4
1µF
AGND
Watchdog 2 controls reset and regulators power cycle
Buck key specifications
Figure 1.
Current mode topology for excellent transient response
3 MHz operating frequency
Uses tiny multilayer inductors and capacitors
Mode pin selects forced PWM or auto PFM/PSM modes
100% duty cycle low dropout mode
LDOs key specifications
Low VIN from 1.7 V to 5.5 V
Stable with1 µF ceramic output capacitors
High PSRR, 60 dB PSRR up to 1 kHz/10 kHz
Low output noise
110 µV rms typical output noise at VOUT = 2.8 V
Low dropout voltage: 150 mV at 300 mA load
−40°C to +125°C junction temperature range
GENERAL DESCRIPTION
The ADP5042 combines one high performance buck regulator
and two low dropout regulators (LDO) in a small 20-lead
LFCSP to meet demanding performance and board space
requirements.
The low quiescent current, low dropout voltage, and wide input
voltage range of the ADP5042 LDOs extend the battery life of
portable devices. The two LDOs maintain power supply
rejection greater than 60 dB for frequencies as high as 10 kHz
while operating with a low headroom voltage.
The high switching frequency of the buck regulator enables
use of tiny multilayer external components and minimizes the
board space.
Each regulator is activated by a high level on the respective
enable pin. The ADP5042 is available with factory programmable
default output voltages and can be set to a wide range of options.
The MODE pin selects the buck mode of operation. When set
to logic high, the buck regulators operate in forced PWM mode.
When the MODE pin is set to logic low, the buck regulators
operate in PWM mode when the load is around the nominal
value. When the load current falls below a predefined threshold
the regulator operates in power save mode (PSM) improving
the light-load efficiency.
The ADP5042 contains supervisory circuits that monitor
power supply voltage levels and code execution integrity in
microprocessor-based systems. They also provide power-on
reset signals. An on-chip dual watchdog timer can reset the
microprocessor or power cycle the system (Watchdog 2) if it
fails to strobe within a preset timeout period.
Rev. A
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