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ADP50460008CBZR

更新时间： 2024-01-03 12:17:13
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
60页 931K
描述
POWER SUPPLY SUPPORT CKT

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ADP50460008CBZR 技术参数

生命周期：Active包装说明：WLCSP-64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.69
可调阈值：YES模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码：S-PBGA-B64长度：3.96 mm
信道数量：9功能数量：1
端子数量：64最高工作温度：85 °C
最低工作温度：-25 °C封装主体材料：PLASTIC/EPOXY
封装代码：VFBGA封装形状：SQUARE
封装形式：GRID ARRAY, VERY THIN PROFILE, FINE PITCH座面最大高度：0.65 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2.1 V
标称供电电压 (Vsup)：3.6 V表面贴装：YES
温度等级：OTHER端子形式：BALL
端子节距：0.5 mm端子位置：BOTTOM
宽度：3.96 mmBase Number Matches：1

ADP50460008CBZR 数据手册

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Compact PMU with Six DC-to-DC Channels,  
Two LDOs, Load Switch, and RTC  
ADI Confidential  
ADP50460008  
FEATURES  
APPLICATIONS  
Wide input voltage range: 2.1 V to 5.5 V  
2.5 MHz switching frequency  
Digital still cameras  
Digital video cameras  
Current mode architecture for best transient performance  
Internal compensation and soft start  
I2C-programmable output levels and power sequencing  
PSM mode on Channel 1  
Multimedia devices  
Space-constrained portable equipment  
GENERAL DESCRIPTION  
The ADP5046 is a compact, multi-output power management unit  
(PMU) designed for space-constrained applications that require  
high efficiency power regulation. The device includes a boost,  
a buck-boost, and three buck regulators; two LDOs; a backlight  
driver; a load switch; and an RTC/backup battery manager. The  
total solution size is minimized through a combination of chip scale  
packaging; high frequency switches; and the integration of power  
FETs, external compensation, and feedback resistors. To ensure  
maximum flexibility, the voltage outputs, power sequencing, and  
soft start time can be programmed via the I2C interface or set by  
factory programming.  
Power  
Channel 1: synchronous boost regulator, 1.2 A maximum  
Channel 2: H-bridge buck-boost regulator, 0.9 A maximum  
Channel 3: synchronous buck regulator, 1.8 A maximum  
Channel 4: synchronous buck regulator, 0.9 A maximum  
Channel 5: 45 mΩ load switch, 0.8 A  
Channel 6: synchronous buck regulator, 0.9 A maximum  
Channel 7: HV boost regulator for backlight LED,  
up to 23.75 V (typical)  
Channel 8: LDO regulator, 100 mA maximum  
Channel 9: low quiescent current LDO, 50 mA maximum  
Auxiliary  
Real-time clock (RTC) with backup battery charger  
Flexible power sequence control  
Reset for external microprocessor  
Package  
4 mm × 4 mm, 64-ball WLCSP  
FUNCTIONAL BLOCK DIAGRAM  
SCL  
SDA  
2
SYSTEM  
I C  
CH 1 SYNC BOOST  
REGULATOR  
INTERFACE  
I/O  
CH 2 BUCK-BOOST  
REGULATOR  
REGISTER  
VCORE  
POWER  
SEQUENCER  
CH 3 BUCK  
REGULATOR  
ALARM OUT  
AUXILIARY  
AUXILIARY  
RTC  
CH 4 BUCK  
LOGIC  
REGULATOR  
CH 9 KEEP ALIVE  
LDO  
REGULATOR  
SUB CPU  
CH 5 LOAD SWITCH  
MEMORY  
XTAL  
OSCILLATOR  
CH 6 BUCK  
REGULATOR  
32kHz  
BACKUP  
BATTERY  
CHARGER  
BACKUP BATTERY  
BACKLIGHT LEDs  
ANALOG  
CH 7 BOOST  
REGULATOR  
CH 8 LDO  
REGULATOR  
RESET  
RESET OUT  
Figure 1.  
Rev. Sp0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2012 Analog Devices, Inc. All rights reserved.  
 
 
 
 
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