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ADP5055 PDF预览

ADP5055

更新时间: 2024-11-24 14:57:47
品牌 Logo 应用领域
亚德诺 - ADI 调节器
页数 文件大小 规格书
50页 1129K
描述
集成式三通道降压调节器电源解决方案

ADP5055 数据手册

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Triple Buck Regulator  
Integrated Power Solution  
ADP5055  
Data Sheet  
FEATURES  
TYPICAL APPLICATION CIRCUIT  
Wide input voltage range: 2.75 V to 18 V  
ADP5055  
Bias input voltage range: 4.5 V to 18 V  
VBIAS  
VREG  
C1  
RT  
(V  
= 4.5V  
BIAS  
TO 18V)  
INT  
REG  
Operation up to 150°C junction temperature  
PMBus-compatible interface with configurable address  
FB1 voltage accuracy (default): −0.62% to +0.69% (−40°C ≤  
TJ ≤ +125°C)  
Channel 1 and Channel 2: 7 A synchronous buck regulator  
(9.4 A minimum valley current-limit threshold)  
Channel 1 and Channel 2: 14 A output in parallel operation  
Channel 3: 3 A synchronous buck regulator (4.2 A minimum  
valley current-limit threshold)  
OSC  
V
SYNC/MODE  
RAMP1  
2.75V  
TO 18V  
BST1  
C3  
SW1  
PVIN1  
C2  
L1  
VOUT1  
C4  
CHANNEL 1  
7A BUCK  
FB1  
COMP1  
PGND  
EN1  
RAMP2  
BST2  
PVIN2  
C5  
8-bit precision DAC for DVS  
Adjustable feedback voltage range: 408 mV to 790.5 mV  
per 1.5 mV step  
C6  
L2  
VOUT2  
C7  
SW2  
FB2  
CHANNEL 2  
7A BUCK  
COMP2  
PGND  
Upper and lower threshold limit setting  
EN2  
250 kHz to 2500 kHz adjustable switching frequency range  
External compensation for fast load transient response  
Precision enable pin with 0.615 V accurate threshold  
Programmable power-up and power-down sequence  
Selective active output discharge switch  
RAMP3  
BST3  
PVIN3  
C8  
C9  
L3  
VOUT3  
C10  
SW3  
FB3  
CHANNEL 3  
3A BUCK  
COMP3  
PGND  
EN3  
Selective FPWM/PSM mode selection  
PWRGD  
CFG1  
SCL  
SDA  
Frequency synchronization input or output  
Power-good flag on selective channels  
UVLO, overcurrent protection, and TSD protection  
43-terminal, 5.00 mm × 5.50 mm LGA package  
MISC  
GND  
PMBus  
CFG2  
APPLICATIONS  
Figure 1.  
Small cell base stations  
Field programmable gate array (FPGA) and processor  
applications  
Security and surveillance  
Medical applications  
The switching frequency of the ADP5055 can be programmed  
or synchronized to an external clock. The ADP5055 contains an  
enable pin (ENx) on each channel for simple power-up  
sequencing or adjustable undervoltage lockout (UVLO) threshold.  
The ADP5055 integrates a high precision 8-bit digital-to-analog  
converter (DAC) to enable the output voltage dynamic voltage  
scaling (DVS) via the PMBus®-compatible, 2-wire interface. The  
PMBus interface provides other flexible configurations, such as  
start-up and shutdown sequence control, individual forced pulse-  
width modulation or power saving mode (FPWM or PSM)  
selection, an output discharge switch, and a power-good signal.  
GENERAL DESCRIPTION  
The ADP5055 combines three high performance buck regulators  
in a 43-terminal land grid array (LGA) package that meets the  
demanding performance and board space requirements. The  
device enables direct connection to high input voltages up to  
18 V with no preregulators.  
All channels integrate both high-side and low-side power metal-  
oxide semiconductor field effect transistors (MOSFETs) to achieve  
an efficiency optimized solution. Channel 1 and Channel 2 deliver  
a programmable output current of 3.5 A or 7 A or provide a single  
output with up to 14 A of current in parallel operation. Channel 3  
delivers a programmable output current of 1.5 A or 3 A.  
The ADP5055 is rated at −40°C to +150°C junction temperature.  
Note that throughout this data sheet, multifunction pins, such  
as SYNC/MODE, are referred to either by the entire pin name  
or by a single function of the pin, for example, SYNC, when  
only that function is relevant.  
Rev. 0  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice.  
No license is granted by implication or otherwise under any patent or patent rights of Analog  
Devices. Trademarks and registeredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2022 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 

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