5-Channel Integrated Power Solution with Quad
Buck Regulators and 200 mA LDO Regulator
Data Sheet
ADP5052
FEATURES
TYPICAL APPLICATION CIRCUIT
ADP5052
Wide input voltage range: 4.5 V to 15 V
SYNC/MODE
VREG
INT VREG
1.5% output accuracy over full temperature range
250 kHz to 1.4 MHz adjustable switching frequency
Adjustable/fixed output options via factory fuse
Power regulation
VDD
OSCILLATOR
RT
C1
100mA
C0
FB1
PVIN1
4.5V TO 15V
BST1
SW1
C3
CHANNEL 1
BUCK REGULATOR
(1.2A/2.5A/4A)
L1
VOUT1
C4
C2
COMP1
VREG
Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A
sync buck regulators with low-side FET driver
Channel 3 and Channel 4: 1.2 A sync buck regulators
Channel 5: 200 mA low dropout (LDO) regulator
Always alive 5.1 V LDO supply for tiny load demand
Single 8 A output (Channel 1 and Channel 2 operated
in parallel)
Precision enable with 0.8 V accurate threshold
Active output discharge switch
FPWM or automatic PWM/PSM mode selection
Frequency synchronization input or output
Optional latch-off protection on OVP/OCP failure
Power-good flag on selected channels
Q1
Q2
EN1
DL1
SS12
R
ILIM1
PGND
DL2
R
ILIM2
PVIN2
C5
VREG
CHANNEL 2
BUCK REGULATOR
(1.2A/2.5A/4A)
VOUT2
C7
SW2
COMP2
L2
C6
C9
BST2
FB2
EN2
PWRGD
PVIN3
BST3
L3
C8
VOUT3
C10
SW3
COMP3
EN3
CHANNEL 3
BUCK REGULATOR
(1.2A)
FB3
PGND3
SS34
BST4
PVIN4
C12
L4
VOUT4
C13
SW4
FB4
CHANNEL 4
BUCK REGULATOR
(1.2A)
C11
UVLO, OCP, and TSD protection
48-lead, 7 mm × 7 mm LFCSP package
−40°C to +125°C junction temperature
COMP4
EN4
PGND4
VOUT5
FB5
VOUT5
C15
1.7V TO 5.5V
C14
PVIN5
EN5
CHANNEL 5
200mA LDO
REGULATOR
APPLICATIONS
Small cell base stations
EXPOSED PAD
FPGA and processor applications
Security and surveillance
Medical applications
Figure 1.
GENERAL DESCRIPTION
The ADP5052 combines four high performance buck regulators
and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP
package that meets demanding performance and board space
requirements. The device enables direct connection to high input
voltages up to 15 V with no preregulators.
Channel 3 and Channel 4 integrate both high-side and low-side
MOSFETs to deliver output current of 1.2 A.
The switching frequency of the ADP5052 can be programmed
or synchronized to an external clock. The ADP5052 contains a
precision enable pin on each channel for easy power-up sequencing
or adjustable UVLO threshold.
Channel 1 and Channel 2 integrate high-side power MOSFETs and
low-side MOSFET drivers. External NFETs can be used in low-side
power devices to achieve an efficiency optimized solution and
deliver a programmable output current of 1.2 A, 2.5 A, or 4 A.
Combining Channel 1 and Channel 2 in a parallel configuration
can provide a single output with up to 8 A of current.
The ADP5052 integrates a general-purpose LDO regulator with
low quiescent current and low dropout voltage that provides up
to 200 mA of output current.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2013 Analog Devices, Inc. All rights reserved.
www.analog.com