Datasheet > ADP5053ACPZ-R7

ADP5053ACPZ-R7

更新时间： 2024-01-27 20:15:31

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
38页	1038K
描述
Integrated Power Solution with Quad Buck Regulators and Supervisory Circuits

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ADP5053ACPZ-R7 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	HVQCCN, LCC48,.27SQ,20
针数：	48	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	1.64	可调阈值：	YES
模拟集成电路 - 其他类型：	POWER SUPPLY MANAGEMENT CIRCUIT	JESD-30 代码：	S-XQCC-N48
长度：	7 mm	信道数量：	4
功能数量：	1	端子数量：	48
最高工作温度：	125 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装等效代码：	LCC48,.27SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	12 V	认证状态：	Not Qualified
座面最大高度：	0.8 mm	子类别：	Power Management Circuits
最大供电电流 (Isup)：	6.35 mA	最大供电电压 (Vsup)：	15 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	12 V
表面贴装：	YES	技术：	DMOS
温度等级：	AUTOMOTIVE	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7 mm
Base Number Matches：	1

ADP5053ACPZ-R7 数据手册

Integrated Power Solution with Quad Buck

Regulators and Supervisory Circuits

ADP5053

Data Sheet

FEATURES

TYPICAL APPLICATION CIRCUIT

ADP5053

Wide input voltage range: 4.5 V to 15.0 V

SYNC/MODE

VREG

INT VREG

1.5% output accuracy over full temperature range

250 kHz to 1.4 MHz adjustable switching frequency

Adjustable/fixed output options via factory fuse

Power regulation

VDD

OSCILLATOR

100mA

FB1

PVIN1

4.5V TO 15V

BST1

SW1

CHANNEL 1

BUCK REGULATOR

(1.2A/2.5A/4A)

VOUT1

COMP1

VREG

Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A

sync buck regulators with low-side FET driver

Channel 3 and Channel 4: 1.2 A sync buck regulators

Single 8 A output (Channel 1 and Channel 2 operated in parallel)

Precision enable with 0.8 V accurate threshold

Active output discharge switch

FPWM or automatic PWM/PSM selection

Frequency synchronization input or output

Optional latch-off protection on OVP/OCP failure

Power-good flag on selected channels

UVLO, OCP, and TSD protection

EN1

DL1

SS12

ILIM1

PGND

DL2

ILIM2

PVIN2

VREG

CHANNEL 2

BUCK REGULATOR

(1.2A/2.5A/4A)

VOUT2

SW2

COMP2

BST2

FB2

EN2

PWRGD

PVIN3

BST3

VOUT3

C10

SW3

CHANNEL 3

BUCK REGULATOR

(1.2A)

COMP3

EN3

FB3

PGND3

SS34

BST4

Open-drain processor reset with external adjustable

threshold monitoring

Watchdog refresh input

PVIN4

C12

VOUT4

C13

SW4

FB4

CHANNEL 4

BUCK REGULATOR

(1.2A)

C11

COMP4

EN4

VREG

PGND4

RSTO

VTH

Manual reset input

WDI

WATCHDOG

AND RESET

APPLICATIONS

VOUTx

Small cell base stations

FPGA and processor applications

Security and surveillance

Medical applications

EXPOSED PAD

Figure 1.

GENERAL DESCRIPTION

The ADP5053 combines four high performance buck regulators, a

supervisory circuit, a watchdog timer, and a manual reset in a

48-lead LFCSP package that meets demanding performance and

board space requirements. The device enables direct connection

to high input voltages up to 15.0 V with no preregulators.

The switching frequency of the ADP5053 can be programmed

or synchronized to an external clock. The ADP5053 contains a

precision enable pin on each channel for easy power-up sequencing

or adjustable UVLO threshold.

The ADP5053 contains supervisory circuits that monitor the

voltage level. The watchdog timer can generate a reset if the

WDI pin is not toggled within a preset timeout period. Processor

reset mode or system power on/off switch mode can be selected

for manual reset functionality.

Channel 1 and Channel 2 integrate high-side power MOSFET and

low-side MOSFET drivers. External NFETs can be used in low-side

power devices to achieve an efficiency optimized solution and

deliver a programmable output current of 1.2 A, 2.5 A, or 4 A.

Combining Channel 1 and Channel 2 in a parallel configuration

can provide a single output with up to 8 A of current.

Table 1. Family Models

Model

ADP5050 Four bucks, one LDO

ADP5051 Four bucks, supervisory

Channels

I²C

Package

Channel 3 and Channel 4 integrate both high-side and low-side

MOSFETs to deliver an output current of 1.2 A.

Yes 48-Lead LFCSP

ADP5052 Four bucks, one LDO

ADP5053 Four bucks, supervisory

ADP5054 Four high current bucks

48-Lead LFCSP

Rev. C

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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