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ADP5050ACPZ-R7 PDF预览

ADP5050ACPZ-R7

更新时间: 2024-01-27 20:06:35
品牌 Logo 应用领域
亚德诺 - ADI 稳压器
页数 文件大小 规格书
60页 1291K
描述
5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator

ADP5050ACPZ-R7 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN, LCC48,.27SQ,20
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:1.72模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:15 V最小输入电压:4.5 V
标称输入电压:12 VJESD-30 代码:S-XQCC-N48
JESD-609代码:e3长度:7 mm
湿度敏感等级:3功能数量:1
端子数量:48最高工作温度:125 °C
最低工作温度:-40 °C最大输出电流:4 A
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC48,.27SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE认证状态:Not Qualified
座面最大高度:0.8 mm子类别:Switching Regulator or Controllers
表面贴装:YES切换器配置:BUCK
最大切换频率:1400 kHz技术:DMOS
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:7 mm
Base Number Matches:1

ADP5050ACPZ-R7 数据手册

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5-Channel Integrated Power Solution with Quad  
Buck Regulators and 200 mA LDO Regulator  
Data Sheet  
ADP5050  
FEATURES  
TYPICAL APPLICATION CIRCUIT  
ADP5050  
Wide input voltage range: 4.5 V to 15 V  
SYNC/MODE  
VREG  
INT VREG  
1.5% output accuracy over full temperature range  
250 kHz to 1.4 MHz adjustable switching frequency  
Adjustable/fixed output options via factory fuse or I2C interface  
I2C interface with interrupt on fault conditions  
Power regulation  
VDD  
OSCILLATOR  
RT  
C1  
100mA  
C0  
FB1  
PVIN1  
4.5V TO 15V  
BST1  
SW1  
C3  
CHANNEL 1  
BUCK REGULATOR  
(1.2A/2.5A/4A)  
L1  
VOUT1  
C4  
C2  
COMP1  
VREG  
Q1  
Q2  
EN1  
DL1  
Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A  
sync buck regulators with low-side FET driver  
Channel 3 and Channel 4: 1.2 A sync buck regulators  
Channel 5: 200 mA low dropout (LDO) regulator  
Single 8 A output (Channel 1 and Channel 2 operated in parallel)  
Dynamic voltage scaling (DVS) for Channel 1 and Channel 4  
Precision enable with 0.8 V accurate threshold  
Active output discharge switch  
SS12  
R
ILIM1  
PGND  
DL2  
R
ILIM2  
PVIN2  
C5  
VREG  
CHANNEL 2  
BUCK REGULATOR  
(1.2A/2.5A/4A)  
VOUT2  
C7  
SW2  
COMP2  
L2  
C6  
C9  
BST2  
FB2  
EN2  
PVIN3  
BST3  
L3  
C8  
VOUT3  
C10  
SW3  
COMP3  
EN3  
CHANNEL 3  
BUCK REGULATOR  
(1.2A)  
Programmable phase shift in 90° steps  
FB3  
Individual channel FPWM/PSM mode selection  
Frequency synchronization input or output  
Optional latch-off protection on OVP/OCP failure  
Power-good flag on selected channels  
Low input voltage detection  
Overheat detection on junction temperature  
UVLO, OCP, and TSD protection  
PGND3  
SS34  
BST4  
PVIN4  
C12  
L4  
VOUT4  
C13  
SW4  
FB4  
CHANNEL 4  
BUCK REGULATOR  
(1.2A)  
C11  
COMP4  
EN4  
PGND4  
VOUT5  
FB5  
VOUT5  
C15  
1.7V TO 5.5V  
C14  
PVIN5  
EN5  
CHANNEL 5  
200mA LDO  
REGULATOR  
48-lead, 7 mm × 7 mm LFCSP package  
−40°C to +125°C junction temperature  
VDDIO  
PWRGD  
nINT  
2
ALERT  
I
C
SCL  
SDA  
APPLICATIONS  
EXPOSED PAD  
Small cell base stations  
Figure 1.  
FPGA and processor applications  
Security and surveillance  
Medical applications  
GENERAL DESCRIPTION  
The ADP5050 combines four high performance buck regulators  
and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP  
package that meets demanding performance and board space  
requirements. The device enables direct connection to high input  
voltages up to 15 V with no preregulators.  
The switching frequency of the ADP5050 can be programmed  
or synchronized to an external clock. The ADP5050 contains a  
precision enable pin on each channel for easy power-up sequencing  
or adjustable UVLO threshold.  
The ADP5050 integrates a general-purpose LDO regulator with  
low quiescent current and low dropout voltage that provides up  
to 200 mA of output current.  
The optional I2C interface provides the user with flexible  
configuration options, including adjustable and fixed output  
voltage options, junction temperature overheat warning, low  
input voltage detection, and dynamic voltage scaling (DVS).  
Channel 1 and Channel 2 integrate high-side power MOSFETs and  
low-side MOSFET drivers. External NFETs can be used in low-side  
power devices to achieve an efficiency optimized solution and  
deliver a programmable output current of 1.2 A, 2.5 A, or 4 A.  
Combining Channel 1 and Channel 2 in a parallel configuration  
can provide a single output with up to 8 A of current.  
Channel 3 and Channel 4 integrate both high-side and low-side  
MOSFETs to deliver output current of 1.2 A.  
Rev. 0  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2013 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 

ADP5050ACPZ-R7 替代型号

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ADP5052ACPZ-R7 ADI

完全替代

5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator
ADP2384ACPZN-R7 ADI

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