Datasheet > 74VCXH16245TTR

74VCXH16245TTR

更新时间： 2024-11-05 23:24:35

品牌	Logo	应用领域
其他 - ETC		总线收发器逻辑集成电路光电二极管
页数	文件大小	规格书
10页	81K
描述
Bus Transceiver

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中文翻译

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数据手册

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74VCXH16245TTR 数据手册

74VCXH16245

LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER

(3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

■

3.6V TOLERANT INPUTS AND OUTPUTS

HIGH SPEED :

= 2.5 ns (MAX.) at V = 3.0 to 3.6V

= 3.2 ns (MAX.) at V = 2.3 to 2.7V

■

POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

TSSOP

TUBE

|I | = I = 24mA (MIN) at V = 3.0V

|I | = I = 18mA (MIN) at V = 2.3V

■

OPERATING VOLTAGE RANGE:

(OPR) = 1.8V to 3.6V

ORDER CODES

PACKAGE

T & R

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES H16245

TSSOP

74VCXH16245TTR

■

BUS HOLD PROVIDED ON BOTH SIDES

LATCH-UP PERFORMANCE EXCEEDS

300mA (JESD 17)

PIN CONNECTION

■

ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);

MM > 200V

DESCRIPTION

The 74VCXH16245 is a low voltage CMOS 16 BIT

BUS TRANSCEIVER (3-STATE) fabricated with

sub-micron silicon gate and five-layer metal wiring

C MOS technology. It is ideal for low power and

very high speed 2.3 to 3.6V applications; it can be

interfaced to 3.6V signal environment for both

inputs and outputs.

This IC is intended for two-way asynchronous

communication between data buses; the direction

of data transmission is determined by DIR input.

The two enable inputs nG can be used to disable

the device so that the buses are effectively

isolated.

Bus hold on data inputs is provided in order to

eliminate the need for external pull-up or

pull-down resistor.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

All floating bus terminals during High Z State must

be held HIGH or LOW.

October 2002

1/10

12 3 4 5 6 7...10

中文翻译

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