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74VCXH16374GX PDF预览

74VCXH16374GX

更新时间： 2024-11-09 04:48:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路
页数 文件大小 规格书
11页 174K
描述
Low Voltage 16-Bit D-Type Flip-Flop with Bushold

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中文翻译

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74VCXH16374GX 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：BGA包装说明：5.50 MM, PLASTIC, MO-205, FBGA-54
针数：54Reach Compliance Code：compliant
风险等级：5.86Is Samacsys：N
系列：ALVC/VCX/AJESD-30 代码：R-PBGA-B54
JESD-609代码：e0长度：8 mm
负载电容（CL）：30 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：100000000 Hz最大I（ol）：0.024 A
位数：8功能数量：2
端口数量：2端子数量：54
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：LFBGA
封装等效代码：BGA54,6X9,32封装形状：RECTANGULAR
封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
Prop。Delay @ Nom-Sup：3 ns传播延迟（tpd）：15.6 ns
认证状态：Not Qualified座面最大高度：1.4 mm
子类别：FF/Latches最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.4 V标称供电电压 (Vsup)：1.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：5.5 mm
Base Number Matches：1

74VCXH16374GX 数据手册

 浏览型号74VCXH16374GX的Datasheet PDF文件第2页浏览型号74VCXH16374GX的Datasheet PDF文件第3页浏览型号74VCXH16374GX的Datasheet PDF文件第4页浏览型号74VCXH16374GX的Datasheet PDF文件第5页浏览型号74VCXH16374GX的Datasheet PDF文件第6页浏览型号74VCXH16374GX的Datasheet PDF文件第7页 
January 2000  
Revised June 2005  
74VCXH16374  
Low Voltage 16-Bit D-Type Flip-Flops with Bushold  
General Description  
The VCXH16374 contains sixteen non-inverting D-type  
flip-flops with 3-STATE outputs and is intended for bus ori-  
Features  
■ 1.4V to 3.6V VCC supply operation  
ented applications. The device is byte controlled. A buff-  
ered clock (CP) and output enable (OE) are common to  
each byte and can be shorted together for full 16-bit opera-  
tion.  
■ 3.6V tolerant control inputs and outputs  
■ Bushold on data inputs eliminates the need for external  
pull-up/pull-down resistors  
The VCXH16374 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
■ tPD  
3.0 ns max for 3.0V to 3.6V VCC  
The 74VCXH16374 is designed for low voltage (1.4V to  
3.6V) VCC applications with output compatibility up to 3.6V.  
■ Static Drive (IOH/IOL  
)
24 mA @ 3.0V VCC  
The 74VCXH16374 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
■ Uses patented noise/EMI reduction circuitry  
■ Latch-up performance exceeds 300 mA  
■ ESD performance:  
Human body model 2000V  
Machine model 200V  
■ Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
Ordering Code:  
Order Number  
Package Number  
Package Descriptions  
74VCXH16374GX  
(Note 1)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
74VCXH16374MTD  
(Note 2)  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Note 1: BGA package available in Tape and Reel only.  
Note 2: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
© 2005 Fairchild Semiconductor Corporation  
DS500228  
www.fairchildsemi.com  
1234567...11

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