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74VCXH1632245 PDF预览

74VCXH1632245

更新时间: 2024-11-09 04:48:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器转换器电平转换器
页数 文件大小 规格书
17页 382K
描述
16-BIT DUAL SUPPLY BUS TRANSCEIVER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR

74VCXH1632245 数据手册

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74VCXH1632245  
16-BIT DUAL SUPPLY BUS TRANSCEIVER  
LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR  
HIGH SPEED: t = 4.4ns (MAX.) at T =85°C  
PD A  
V
= 3.0V V  
= 2.3V  
CCA  
CCB  
LOW POWER DISSIPATION:  
= I = 20µA(MAX.) at T =85°C  
I
CCA  
CCB  
A
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 8mA MIN at  
OHA  
OLA  
V
= 3.0V; V  
= 1.65V or 2.3V  
CCA  
OHB  
CCB  
TSSOP  
TFBGA  
µTFBGA  
|I  
V
| = I  
= 6mA (MIN at  
OLB  
= 2.3V or 3.0V; V  
= 1.65V)  
CCB  
CCA  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SERIES RESISTOR ON A SIDE  
T & R  
TSSOP48  
TFBGA54  
74VCXH1632245TTR  
74VCXH1632245LBR  
74VCXH1632245TBR  
OPERATING VOLTAGE RANGE:  
µTFBGA42  
V
(OPR) = 2.3V to 3.6V (1.2V Data  
CCA  
Retention)  
(OPR) = 1.65V to2.7V (1.2V Data  
Retention)  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 16245  
V
CCB  
bus terminals during High Z State don’t need ex-  
ternal pull-up or pull-down resistor.  
BUS HOLD PROVIDED ON DATA INPUT  
BOTH SIDE  
LOGIC DIAGRAM  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
DESCRIPTION  
The 74VCXH1632245 is a dual supply low voltage  
CMOS 16-BIT BUS TRANSCEIVER fabricated  
with sub-micron silicon gate and five-layer metal  
2
wiring C MOS technology. Designed for use as an  
interface between a 3.3V bus and a 2.5V or 1.8V  
bus in a mixed 3.3V/1.8V,3.3V/2.5V and 2.5V/  
1.8V supply systems, it achieves high speed  
operation while maintaining the CMOS low power  
dissipation.  
This IC is intended for two-way asynchronous  
communication between data buses and the  
direction of data transmission is determined by  
nDIR inputs. The enable inputs nG can be used to  
disable the device so that the buses are effectively  
isolated. The A-port interfaces with the 3V bus, the  
B-port with the 2.5V and 1.8V bus.  
All inputs are equipped with protection circuits  
against static discharge, giving them 2KV ESD im-  
munity and transient excess voltage. All floating  
n = 1, 2  
Rev. 1  
1/17  
June 2004  

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