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74VCXH16373 PDF预览

74VCXH16373

更新时间: 2024-09-15 22:34:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
7页 88K
描述
Low Voltage 16-Bit Transparent Latch with Bushold

74VCXH16373 数据手册

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January 2000  
Revised March 2000  
74VCXH16373  
Low Voltage 16-Bit Transparent Latch with Bushold  
General Description  
Features  
The VCXH16373 contains sixteen non-inverting latches  
with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. The flip-flops  
appear to be transparent to the data when the Latch enable  
(LE) is HIGH. When LE is LOW, the data that meets the  
setup time is latched. Data appears on the bus when the  
Output Enable (OE) is LOW. When OE is HIGH, the out-  
puts are in a high impedance state.  
1.65V–3.6V VCC supply operation  
3.6V tolerant control inputs and outputs  
Bushold on data inputs eliminates the need for external  
pull-up/pull-down resistors  
tPD (In to On)  
3.0 ns max for 3.0V to 3.6V VCC  
3.4 ns max for 2.3V to 2.7V VCC  
6.8 ns max for 1.65V to 1.95V VCC  
The VCXH16373 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
Static Drive (IOH/IOL  
)
The 74VCXH16373 is designed for low voltage (1.65V to  
3.6V) VCC applications with output compatibility up to 3.6V.  
±24 mA @ 3.0V VCC  
±18 mA @ 2.3V VCC  
±6 mA @ 1.65V VCC  
The 74VCXH16373 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Ordering Code:  
Package  
Ordering Number  
Number  
Package Description  
74VCXH16373MTD  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
Latch Enable Input  
Bushold Inputs  
LEn  
I0–I15  
O0–O15  
Outputs  
© 2000 Fairchild Semiconductor Corporation  
DS500229  
www.fairchildsemi.com  

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