Datasheet > 74LVC2G14GV-Q100

74LVC2G14GV-Q100

更新时间： 2024-02-04 15:49:46

品牌	Logo	应用领域
安世 - NEXPERIA		光电二极管逻辑集成电路
页数	文件大小	规格书
16页	238K
描述
Dual inverting Schmitt trigger with 5 V tolerant input

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

74LVC2G14GV-Q100 技术参数

生命周期：	Transferred	零件包装代码：	TSOP
包装说明：	PLASTIC, SC-74, SOT-457, TSOP-6	针数：	6
Reach Compliance Code：	unknown	风险等级：	5.77
Base Number Matches：	1

74LVC2G14GV-Q100 数据手册

74LVC2G14-Q100

Dual inverting Schmitt trigger with 5 V tolerant input

Rev. 5 — 28 January 2019

Product data sheet

1. General description

The 74LVC2G14-Q100 provides two inverting buffers with Schmitt-trigger input. It is capable of

transforming slowly changing input signals into sharply defined, jitter-free output signals.

The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device

in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the inputs makes the circuit tolerant

of slower input rise and fall time. This device is fully specified for partial power-down applications

using I_OFF. The I_OFFcircuitry disables the output, preventing the damaging backflow current

through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant inputs for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:

•

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8B/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

•

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

•

±24 mA output drive (V_CC= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Unlimited rise and fall times

Input accepts voltages up to 5 V

3. Applications

•

Wave and pulse shaper

Astable multivibrator

Monostable multivibrator

12 3 4 5 6 7...16

中文翻译

下载PDF

与74LVC2G14GV-Q100相关器件

型号	品牌	获取价格	描述	数据表
74LVC2G14GV-Q100,125	NXP	获取价格	Inverter, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6
74LVC2G14GV-Q100H	NXP	获取价格	74LVC2G14-Q100 - Dual inverting Schmitt trigger with 5 V tolerant input TSOP 6-Pin
74LVC2G14GW	NXP	获取价格	Dual inverting Schmitt-trigger with 5 V tolerant input
74LVC2G14GW	NEXPERIA	获取价格	Dual inverting Schmitt trigger with 5 V tolerant inputProduction
74LVC2G14GW,125	NXP	获取价格	74LVC2G14 - Dual inverting Schmitt trigger with 5 V tolerant input TSSOP 6-Pin
74LVC2G14GW-Q100	NEXPERIA	获取价格	Dual inverting Schmitt trigger with 5 V tolerant input
74LVC2G14GW-Q100,125	NXP	获取价格	Inverter, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6
74LVC2G14-Q100	NEXPERIA	获取价格	Dual inverting Schmitt trigger with 5 V tolerant input
74LVC2G14W6	DIODES	获取价格	DUAL SCHMITT TRIGGER INVERTER
74LVC2G14W6-7	DIODES	获取价格	DUAL SCHMITT TRIGGER INVERTER

与74LVC2G14GV-Q100相关文章

MBRS340T3G手册解读：参数说明、产品特性及应用
2024-06-28

6
PMOS管背靠背连接：串联还是并联？
2024-06-28

7
高压电解电容的分类与选型策略
2024-06-28

8
数码管：基本概念、分类、技术发展及市场趋势
2024-06-27

14

产品中心

服务支持

精选活动

关于我们

帮助中心

74LVC2G14GV-Q100

74LVC2G14GV-Q100 技术参数

74LVC2G14GV-Q100 数据手册

与74LVC2G14GV-Q100相关器件

与74LVC2G14GV-Q100相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

74LVC2G14GV-Q100

74LVC2G14GV-Q100 技术参数

74LVC2G14GV-Q100 数据手册

与74LVC2G14GV-Q100相关器件

与74LVC2G14GV-Q100相关文章

您还可以找

您在本页遇到什么问题？