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74LVC2G14GW PDF预览

74LVC2G14GW

更新时间: 2024-11-19 11:11:03
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
17页 262K
描述
Dual inverting Schmitt trigger with 5 V tolerant inputProduction

74LVC2G14GW 数据手册

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74LVC2G14  
Dual inverting Schmitt trigger with 5 V tolerant input  
Rev. 13 — 24 January 2022  
Product data sheet  
1. General description  
The 74LVC2G14 is a dual inverter with Schmitt-trigger inputs. Inputs can be driven from either  
3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and  
5 V environments.  
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry  
disables the output, preventing the potentially damaging backflow current through the device when  
it is powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
High noise immunity  
±24 mA output drive (VCC = 3.0 V)  
CMOS low power dissipation  
Direct interface with TTL levels  
Unlimited rise and fall times  
Overvoltage tolerant inputs to 5.5 V  
IOFF circuitry provides partial Power-down mode operation  
Latch-up performance exceeds 250 mA  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8C (2.7 V to 3.6 V)  
JESD36 (4.5 V to 5.5 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C.  
3. Applications  
Wave and pulse shaper  
Astable multivibrator  
Monostable multivibrator  
 
 
 

74LVC2G14GW 替代型号

型号 品牌 替代类型 描述 数据表
74LVC2G14GW,125 NXP

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