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74LVC2G17FZ4-7 PDF预览

74LVC2G17FZ4-7

更新时间： 2024-11-18 15:46:27
品牌 Logo 应用领域
美台 - DIODES 栅光电二极管逻辑集成电路触发器
页数 文件大小 规格书
12页 364K
描述
Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PDSO6, 1.40 X 1 MM, GREEN, DFN-6

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74LVC2G17FZ4-7 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：DFN
包装说明：DFN-6针数：6
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：18 weeks风险等级：1.56
Is Samacsys：N系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-N6JESD-609代码：e4
长度：1.4 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUFFER最大I（ol）：0.024 A
湿度敏感等级：1功能数量：2
输入次数：1端子数量：6
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：VSON
封装等效代码：SOLCC6,.04,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, VERY THIN PROFILE包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：3.3 V
Prop。Delay @ Nom-Sup：7.1 ns传播延迟（tpd）：13.1 ns
认证状态：Not Qualified施密特触发器：YES
座面最大高度：0.4 mm子类别：Gate
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：NO LEAD
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：1 mm
Base Number Matches：1

74LVC2G17FZ4-7 数据手册

 浏览型号74LVC2G17FZ4-7的Datasheet PDF文件第2页浏览型号74LVC2G17FZ4-7的Datasheet PDF文件第3页浏览型号74LVC2G17FZ4-7的Datasheet PDF文件第4页浏览型号74LVC2G17FZ4-7的Datasheet PDF文件第5页浏览型号74LVC2G17FZ4-7的Datasheet PDF文件第6页浏览型号74LVC2G17FZ4-7的Datasheet PDF文件第7页 
74LVC2G17  
DUAL SCHMITT TRIGGER BUFFERS  
Description  
Pin Assignments  
The 74LVC2G17 is a dual Schmitt trigger inverter gate with standard  
push-pull outputs. The device is designed for operation with a power  
supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing  
this device to be used in a mixed voltage environment. The device is  
fully specified for partial power down applications using IOFF. The IOFF  
circuitry disables the output preventing damaging current backflow  
when the device is powered down.  
The gate performs the positive Boolean function:  
Y A  
Features  
Wide Supply Voltage Range from 1.65V to 5.5V  
±24mA Output Drive at 3.0V  
CMOS low power consumption  
IOFF Supports Partial-Power-Down Mode Operation  
Inputs accept up to 5.5V  
Applications  
ESD Protection Tested per JESD 22  
Voltage Level Shifting  
.
.
.
Exceeds 200-V Machine Model (A115)  
General Purpose Logic  
Exceeds 2000-V Human Body Model (A114)  
Exceeds 1000-V Charged Device Model (C101)  
Power Down Signal Isolation  
Wide array of products such as:  
Latch-Up Exceeds 100mA per JESD 78, Class I  
DFN1409 package designed as a direct replacement for chip  
scale packaging.  
.
.
.
.
.
PCs, networking, notebooks, netbooks, tablets  
Computer peripherals, hard drives, CD/DVD ROM  
TV, DVD, DVR, set top box  
Range of Package Options SOT26, SOT353, DFN1010,  
DFN1409 and DFN1410  
Cell Phones, Personal Navigation / GPS  
MP3 players ,Cameras, Video Recorders  
Leadless packages per JESD30E  
.
.
.
DFN1410 denoted as X2-DFN1410-6  
DFN1409 denoted as X2-DFN1409-6  
DFN1010 denoted as X2-DFN1010-6  
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)  
Halogen and Antimony Free. “Green” Device (Note 3)  
Notes:  
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.  
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"  
and Lead-free.  
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl)  
and < 1000 ppm antimony compounds.  
Click here for ordering information, located at the end of datasheet  
1 of 12  
www.diodes.com  
October 2013  
© Diodes Incorporated  
74LVC2G17  
Document number: DS35164 Rev. 5 - 2  
1234567...12

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