5秒后页面跳转
74LVC2G17GN PDF预览

74LVC2G17GN

更新时间: 2024-11-19 11:11:39
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
17页 253K
描述
Dual non-inverting Schmitt trigger with 5 V tolerant inputProduction

74LVC2G17GN 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SON,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.58
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-N6
JESD-609代码:e3长度:1 mm
逻辑集成电路类型:BUFFER湿度敏感等级:1
功能数量:2输入次数:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SON封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):13.1 ns座面最大高度:0.35 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.3 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:0.9 mm
Base Number Matches:1

74LVC2G17GN 数据手册

 浏览型号74LVC2G17GN的Datasheet PDF文件第2页浏览型号74LVC2G17GN的Datasheet PDF文件第3页浏览型号74LVC2G17GN的Datasheet PDF文件第4页浏览型号74LVC2G17GN的Datasheet PDF文件第5页浏览型号74LVC2G17GN的Datasheet PDF文件第6页浏览型号74LVC2G17GN的Datasheet PDF文件第7页 
74LVC2G17  
Dual non-inverting Schmitt trigger with 5 V tolerant input  
Rev. 11 — 24 January 2022  
Product data sheet  
1. General description  
The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V  
or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V  
environments.  
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry  
disables the output, preventing the potentially damaging backflow current through the device when  
it is powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
Overvoltage tolerant inputs to 5.5 V  
High noise immunity  
±24 mA output drive (VCC = 3.0 V)  
CMOS low-power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
IOFF circuitry provides partial Power-down mode operation  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD-8B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Applications  
Wave and pulse shapers for highly noisy environments  
 
 
 

与74LVC2G17GN相关器件

型号 品牌 获取价格 描述 数据表
74LVC2G17GS NXP

获取价格

Dual non-inverting Schmitt trigger with 5 V tolerant input
74LVC2G17GS NEXPERIA

获取价格

Dual non-inverting Schmitt trigger with 5 V tolerant inputProduction
74LVC2G17GV NXP

获取价格

Dual non-inverting Schmitt-trigger with 5 V tolerant input
74LVC2G17GV NEXPERIA

获取价格

Dual non-inverting Schmitt trigger with 5 V tolerant inputProduction
74LVC2G17GV ICSI

获取价格

Dual non-inverting Schmitt-trigger with 5 V tolerant input
74LVC2G17GV,125 NXP

获取价格

74LVC2G17 - Dual non-inverting Schmitt trigger with 5 V tolerant input TSOP 6-Pin
74LVC2G17GV-Q100 NXP

获取价格

Dual non-inverting Schmitt trigger with 5 V tolerant input
74LVC2G17GV-Q100 NEXPERIA

获取价格

Dual non-inverting Schmitt trigger with 5 V tolerant inputProduction
74LVC2G17GV-Q100H NXP

获取价格

74LVC2G17-Q100 - Dual non-inverting Schmitt trigger with 5 V tolerant input TSOP 6-Pin
74LVC2G17GW ICSI

获取价格

Dual non-inverting Schmitt-trigger with 5 V tolerant input