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74LVC2G16GF

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74LVC2G16GF 数据手册

74LVC2G16

Dual buffer gate

Rev. 2 — 12 October 2016

Product data sheet

1. General description

The 74LVC2G16 provides two buffers.

Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of

these devices in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using I_OFF

The I_OFFcircuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

2. Features and benefits

 Wide supply voltage range from 1.65 V to 5.5 V

 5 V tolerant inputs for interfacing with 5 V logic

 High noise immunity

 Complies with JEDEC standard:

 JESD8-7 (1.65 V to 1.95 V)

 JESD8-5 (2.3 V to 2.7 V)

 JESD8B/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 24 mA output drive (V_CC= 3.0 V)

 CMOS low power consumption

 Latch-up performance exceeds 250 mA

 Direct interface with TTL levels

 Multiple package options

 Specified from 40 C to +85 C and 40 C to +125 C.

12 3 4 5 6 7...14

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型号	品牌	获取价格	描述	数据表
74LVC2G16GM	NEXPERIA	获取价格	Dual buffer gate
74LVC2G16GW	NEXPERIA	获取价格	Dual buffer gate
74LVC2G17	ICSI	获取价格	Dual non-inverting Schmitt-trigger with 5 V tolerant input
74LVC2G17	NXP	获取价格	Dual non-inverting Schmitt-trigger with 5 V tolerant input
74LVC2G17	DIODES	获取价格	DUAL SCHMITT TRIGGER BUFFER
74LVC2G17DW	DIODES	获取价格	DUAL SCHMITT TRIGGER BUFFER
74LVC2G17DW-7	DIODES	获取价格	DUAL SCHMITT TRIGGER BUFFER
74LVC2G17FW4	DIODES	获取价格	DUAL SCHMITT TRIGGER BUFFER
74LVC2G17FW4-7	DIODES	获取价格	DUAL SCHMITT TRIGGER BUFFER
74LVC2G17FX4-7	DIODES	获取价格	Buffer, LVC/LCX/Z Series, 2-Func, 1-Input, CMOS, PBGA6, 1.40 X 0.90 MM, GREEN, DFN-6