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74LVC2G14GV-Q100H PDF预览

74LVC2G14GV-Q100H

更新时间： 2024-11-20 20:50:03
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
16页 122K
描述
74LVC2G14-Q100 - Dual inverting Schmitt trigger with 5 V tolerant input TSOP 6-Pin

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74LVC2G14GV-Q100H 技术参数

生命周期：Transferred零件包装代码：TSOP
包装说明：PLASTIC, SC-74, SOT-457, TSOP-6针数：6
Reach Compliance Code：unknown风险等级：5.77
Base Number Matches：1

74LVC2G14GV-Q100H 数据手册

 浏览型号74LVC2G14GV-Q100H的Datasheet PDF文件第2页浏览型号74LVC2G14GV-Q100H的Datasheet PDF文件第3页浏览型号74LVC2G14GV-Q100H的Datasheet PDF文件第4页浏览型号74LVC2G14GV-Q100H的Datasheet PDF文件第5页浏览型号74LVC2G14GV-Q100H的Datasheet PDF文件第6页浏览型号74LVC2G14GV-Q100H的Datasheet PDF文件第7页 
74LVC2G14-Q100  
Dual inverting Schmitt trigger with 5 V tolerant input  
Rev. 1 — 15 November 2013  
Product data sheet  
1. General description  
The 74LVC2G14-Q100 provides two inverting buffers with Schmitt-trigger input. It can  
transform slowly changing input signals into sharply defined, jitter-free output signals.  
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of  
this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the inputs  
makes the circuit tolerant of slower input rise and fall time. This device is fully specified for  
partial power-down applications using IOFF. The IOFF circuitry disables the output,  
preventing the damaging backflow current through the device when it is powered down.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Wide supply voltage range from 1.65 V to 5.5 V  
5 V tolerant inputs for interfacing with 5 V logic  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Unlimited rise and fall times  
Input accepts voltages up to 5 V  
Multiple package options  
3. Applications  
Wave and pulse shaper  
 
 
 
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