生命周期: | Contact Manufacturer | 包装说明: | DIP, |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.64 | 系列: | F/FAST |
JESD-30 代码: | R-PDIP-T16 | 长度: | 19.18 mm |
逻辑集成电路类型: | J-K FLIP-FLOP | 位数: | 2 |
功能数量: | 2 | 端子数量: | 16 |
最高工作温度: | 70 °C | 最低工作温度: | |
输出极性: | COMPLEMENTARY | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | DIP | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 传播延迟(tpd): | 7.5 ns |
座面最大高度: | 5.08 mm | 最大供电电压 (Vsup): | 5.25 V |
最小供电电压 (Vsup): | 4.75 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | TTL |
温度等级: | COMMERCIAL | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
触发器类型: | NEGATIVE EDGE | 宽度: | 7.62 mm |
最小 fmax: | 130 MHz | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74F112PCX | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F112QC | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,F-TTL,LDCC,20PIN,PLASTIC | |
74F112QCQR | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F112SC | FAIRCHILD |
获取价格 |
Dual JK Negative Edge-Triggered Flip-Flop | |
74F112SCQR | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F112SCX | ETC |
获取价格 |
J-K-Type Flip-Flop | |
74F112SDC | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F112SJ | FAIRCHILD |
获取价格 |
Dual JK Negative Edge-Triggered Flip-Flop | |
74F112SJX | ETC |
获取价格 |
J-K-Type Flip-Flop | |
74F112SJX_NL | FAIRCHILD |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, PDSO16, |