生命周期: | Obsolete | 包装说明: | , |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.64 | 系列: | F/FAST |
逻辑集成电路类型: | J-K FLIP-FLOP | 位数: | 2 |
功能数量: | 2 | 最高工作温度: | 70 °C |
最低工作温度: | 输出极性: | COMPLEMENTARY | |
传播延迟(tpd): | 7.5 ns | 认证状态: | Not Qualified |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 4.5 V |
标称供电电压 (Vsup): | 5 V | 技术: | TTL |
温度等级: | COMMERCIAL | 触发器类型: | NEGATIVE EDGE |
最小 fmax: | 105 MHz | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74F112QC | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,F-TTL,LDCC,20PIN,PLASTIC | |
74F112QCQR | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F112SC | FAIRCHILD |
获取价格 |
Dual JK Negative Edge-Triggered Flip-Flop | |
74F112SCQR | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F112SCX | ETC |
获取价格 |
J-K-Type Flip-Flop | |
74F112SDC | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output | |
74F112SJ | FAIRCHILD |
获取价格 |
Dual JK Negative Edge-Triggered Flip-Flop | |
74F112SJX | ETC |
获取价格 |
J-K-Type Flip-Flop | |
74F112SJX_NL | FAIRCHILD |
获取价格 |
J-K Flip-Flop, 2-Func, Negative Edge Triggered, TTL, PDSO16, | |
74F112SPC | FAIRCHILD |
获取价格 |
J-K Flip-Flop, F/FAST Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output |