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74AUP2G00DC

更新时间： 2024-01-22 16:05:16

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
16页	84K
描述
Low-power dual 2-input NAND gate

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74AUP2G00DC 数据手册

74AUP2G00

Philips Semiconductors

Low-power dual 2-input NAND gate

Table 7.

Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Typ

Max

Unit

T_amb= −40 °C to +125 °C

V_IH

HIGH-level input voltage

V_CC= 0.8 V

0.75 × V_CC

V_CC= 0.9 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

V_CC= 0.8 V

0.70 × V_CC

1.6

2.0

V_IL

LOW-level input voltage

0.25 × V_CC

0.30 × V_CC

0.7

V_CC= 0.9 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

0.9

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= −20 µA; V_CC= 0.8 V to 3.6 V

_CC− 0.11 -

I_O= −1.1 mA; V_CC= 1.1 V

I_O= −1.7 mA; V_CC= 1.4 V

I_O= −1.9 mA; V_CC= 1.65 V

I_O= −2.3 mA; V_CC= 2.3 V

I_O= −3.1 mA; V_CC= 2.3 V

I_O= −2.7 mA; V_CC= 3.0 V

I_O= −4.0 mA; V_CC= 3.0 V

V_I= V_IHor V_IL

0.6 × V_CC

0.93

1.17

1.77

1.67

2.40

2.30

V_OL

LOW-level output voltage

I_O= 20 µA; V_CC= 0.8 V to 3.6 V

I_O= 1.1 mA; V_CC= 1.1 V

I_O= 1.7 mA; V_CC= 1.4 V

I_O= 1.9 mA; V_CC= 1.65 V

I_O= 2.3 mA; V_CC= 2.3 V

I_O= 3.1 mA; V_CC= 2.3 V

I_O= 2.7 mA; V_CC= 3.0 V

I_O= 4.0 mA; V_CC= 3.0 V

V_I= GND to 3.6 V; V_CC= 0 V to 3.6 V

0.11

0.33 × V_CC

0.41

0.39

0.36

0.50

0.36

0.50

I_I

input leakage current

±0.75

µA

I_OFF

∆I_OFF

power-off leakage current V_Ior V_O= 0 V to 3.6 V; V_CC= 0 V

additional power-off

leakage current

V_Ior V_O= 0 V to 3.6 V;

_CC= 0 V to 0.2 V

I_CC

supply current

V_I= GND or V_CC; I_O= 0 A;

_CC= 0.8 V to 3.6 V

1.4

µA

[1]

∆I_CC

additional supply current

V_I= V_CC− 0.6 V; I_O= 0 A;

_CC= 3.3 V

[1] One input at V_CC− 0.6 V, other input at V_CCor GND.

74AUP2G00_1

Product data sheet

Rev. 01 — 25 August 2006

7 of 16

1...4 5 678 9 10...16

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