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74AUP2G00DC-Q100 PDF预览

74AUP2G00DC-Q100

更新时间: 2024-02-22 06:37:45
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
13页 219K
描述
Low-power dual 2-input NAND gateProduction

74AUP2G00DC-Q100 技术参数

生命周期:Active零件包装代码:SSOP
包装说明:,针数:8
Reach Compliance Code:compliant风险等级:5.77
逻辑集成电路类型:NAND GATEBase Number Matches:1

74AUP2G00DC-Q100 数据手册

 浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第2页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第3页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第4页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第5页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第6页浏览型号74AUP2G00DC-Q100的Datasheet PDF文件第7页 
74AUP2G00-Q100  
Low-power dual 2-input NAND gate  
Rev. 3 — 14 July 2023  
Product data sheet  
1. General description  
The 74AUP2G00-Q100 provides dual 2-input NAND function.  
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times  
across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire VCC range  
from 0.8 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing a damaging backflow current through the device when it is powered  
down.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
Wide supply voltage range from 0.8 V to 3.6 V  
High noise immunity  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
Low static power consumption; ICC = 0.9 μA (maximum)  
Latch-up performance exceeds 100 mA per JESD78 Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial power-down mode operation  
ESD protection:  
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V  
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP2G00DC-Q100 -40 °C to +125 °C  
VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1  
body width 2.3 mm  
 
 
 

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